| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 68 DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
69 DstOp(Register R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
70 DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {} in DstOp() function
71 DstOp(const LLT &T) : LLTTy(T), Ty(DstType::Ty_LLT) {} in DstOp() function
72 DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {} in DstOp() function
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| /external/llvm/lib/Target/X86/ |
| D | X86MCInstLower.cpp | 1155 static std::string getShuffleComment(const MachineOperand &DstOp, in getShuffleComment()
1466 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
1488 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
1510 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
1531 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
1561 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
1612 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonRDFOpt.cpp | 121 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
138 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRDFOpt.cpp | 121 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
138 const MachineOperand &DstOp = MI->getOperand(0); in INITIALIZE_PASS_DEPENDENCY() local
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRDFOpt.cpp | 105 const MachineOperand &DstOp = MI->getOperand(0); in interpretAsCopy() local
122 const MachineOperand &DstOp = MI->getOperand(0); in interpretAsCopy() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrFoldTables.h | 70 uint16_t DstOp; member
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| D | X86MCInstLower.cpp | 1771 const MachineOperand &DstOp = MI->getOperand(0); in getShuffleComment() local
2437 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
2518 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
2628 const MachineOperand &DstOp = MI->getOperand(0); in EmitInstruction() local
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrFoldTables.h | 70 uint16_t DstOp; member
|
| D | X86MCInstLower.cpp | 1804 const MachineOperand &DstOp = MI->getOperand(0); in getShuffleComment() local
2168 const MachineOperand &DstOp = MI->getOperand(0); in addConstantComments() local
2247 const MachineOperand &DstOp = MI->getOperand(0); in addConstantComments() local
2356 const MachineOperand &DstOp = MI->getOperand(0); in addConstantComments() local
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.h | 67 DstOp(unsigned R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
68 DstOp(Register R) : Reg(R), Ty(DstType::Ty_Reg) {} in DstOp() function
69 DstOp(const MachineOperand &Op) : Reg(Op.getReg()), Ty(DstType::Ty_Reg) {} in DstOp() function
70 DstOp(const LLT T) : LLTTy(T), Ty(DstType::Ty_LLT) {} in DstOp() function
71 DstOp(const TargetRegisterClass *TRC) : RC(TRC), Ty(DstType::Ty_RC) {} in DstOp() function
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 100 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 100 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | R600ExpandSpecialInstrs.cpp | 85 MachineOperand &DstOp = MI.getOperand(DstIdx); in runOnMachineFunction() local
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 1417 const MachineOperand &DstOp = MI->getOperand(0); in verifyPreISelGenericInstruction() local
1603 const MachineOperand &DstOp = MI->getOperand(0); in visitMachineInstrBefore() local
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| D | MachineScheduler.cpp | 1830 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MachineVerifier.cpp | 1441 const MachineOperand &DstOp = MI->getOperand(0); in verifyPreISelGenericInstruction() local
1528 const MachineOperand &DstOp = MI->getOperand(0); in visitMachineInstrBefore() local
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| D | MachineScheduler.cpp | 1694 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local
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| /external/llvm/lib/Linker/ |
| D | IRMover.cpp | 1049 MDNode *DstOp; in linkModuleFlagsMetadata() local
|
| /external/llvm-project/llvm/lib/Linker/ |
| D | IRMover.cpp | 1233 MDNode *DstOp; in linkModuleFlagsMetadata() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Linker/ |
| D | IRMover.cpp | 1231 MDNode *DstOp; in linkModuleFlagsMetadata() local
|
| /external/llvm/lib/CodeGen/ |
| D | MachineScheduler.cpp | 1604 const MachineOperand &DstOp = Copy->getOperand(0); in constrainLocalCopy() local
|
| /external/llvm-project/llvm/utils/TableGen/ |
| D | GlobalISelEmitter.cpp | 4628 Record *DstOp = Dst->getOperator(); in createInstructionRenderer() local
5119 Record *DstOp = Dst->getOperator(); in runOnPattern() local
|