| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4330 unsigned ExtOp, TruncOp; in PromoteNode() local
4363 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local
4379 unsigned ExtOp, TruncOp; in PromoteNode() local
4420 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
4433 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4539 unsigned ExtOp, TruncOp; in PromoteNode() local
4572 unsigned ExtOp = Node->getOpcode() == ISD::UMUL_LOHI ? ISD::ZERO_EXTEND in PromoteNode() local
4588 unsigned ExtOp, TruncOp; in PromoteNode() local
4631 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
4658 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 1377 unsigned ExtOp = variable
1441 unsigned ExtOp = variable
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | BasicTTIImpl.h | 1622 unsigned ExtOp = in getTypeBasedIntrinsicInstrCost() local
1691 unsigned ExtOp = in getTypeBasedIntrinsicInstrCost() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeDAG.cpp | 4095 unsigned ExtOp, TruncOp; in PromoteNode() local
4113 unsigned ExtOp, TruncOp; in PromoteNode() local
4153 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
4166 unsigned ExtOp = ISD::FP_EXTEND; in PromoteNode() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 401 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
|
| D | SIISelLowering.cpp | 9067 unsigned ExtOp = Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in performIntMed3ImmCombine() local
|
| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 2186 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local
2312 ISD::LoadExtType ExtOp = Ins[InsIdx].Flags.isSExt() ? in LowerFormalArguments() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 451 Value *ExtOp = Builder.CreateZExt(I.getOperand(0), I32Ty); in promoteUniformBitreverseToI32() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 439 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
|
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 434 unsigned ExtOp = getBoolExtOp(getMRI()->getType(Op.getReg()).isVector(), IsFP); in buildBoolExt() local
|
| D | LegalizerHelper.cpp | 6189 unsigned ExtOp = IsSigned ? TargetOpcode::G_SEXT : TargetOpcode::G_ZEXT; in lowerSMULH_UMULH() local
|
| /external/llvm-project/llvm/lib/Transforms/Scalar/ |
| D | SCCP.cpp | 1690 Value *ExtOp = Inst.getOperand(0); in simplifyInstsInBlock() local
|
| /external/llvm-project/llvm/lib/Transforms/Utils/ |
| D | SimplifyIndVar.cpp | 1477 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
|
| /external/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1244 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
|
| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonConstExtenders.cpp | 1533 MachineOperand ExtOp(EV); in insertInitializer() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstExtenders.cpp | 1534 MachineOperand ExtOp(EV); in insertInitializer() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Scalar/ |
| D | IndVarSimplify.cpp | 1396 Value *ExtOp = createExtendInst(Op, WideType, Cmp->isSigned(), Cmp); in widenLoopCompare() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6063 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local
6626 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
13190 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 6266 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local
6771 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
14002 ConstantSDNode *ExtOp = dyn_cast<ConstantSDNode>(Extract.getOperand(1)); in combineBVOfVecSExt() local
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 5201 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_64SVR4() local
5769 unsigned ExtOp = Flags.isSExt() ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND; in LowerCall_Darwin() local
|
| /external/clang/lib/CodeGen/ |
| D | CGBuiltin.cpp | 3782 Value *ExtOp, Value *IndexOp, in packTBLDVectorList()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 17784 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector() local
35659 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local
35695 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local
35738 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ext0, Ext1); in SimplifyDemandedVectorEltsForTargetNode() local
37160 SDValue ExtOp = DAG.getNode(OpCode, dl, MVT::i32, SrcOp, in combineExtractWithShuffle() local
45785 unsigned ExtOp = getOpcode_EXTEND_VECTOR_INREG(InOpcode); in combineExtractSubvector() local
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 6335 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP() local
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 18677 SDValue ExtOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ExtVecVT, in InsertBitToMaskVector() local
38035 SDValue ExtOp = in SimplifyDemandedVectorEltsForTargetNode() local
38095 SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ops); in SimplifyDemandedVectorEltsForTargetNode() local
39897 SDValue ExtOp = DAG.getNode(OpCode, dl, MVT::i32, SrcOp, in combineExtractWithShuffle() local
49314 unsigned ExtOp = getOpcode_EXTEND_VECTOR_INREG(InOpcode); in combineExtractSubvector() local
|