Searched defs:FCC0 (Results 1 – 5 of 5) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 570 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in createCMovFP() local
1716 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in lowerBRCOND() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 669 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in createCMovFP() local
2037 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in lowerBRCOND() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.h | 80 using FCC = enum { FCC0 = 0, FCC1, FCC2, FCC3, FCC4, FCC5, FCC6, FCC7 }; enumerator
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| D | IceTargetLoweringMIPS32.cpp | 3974 Operand *FCC0 = OperandMIPS32FCC::create(getFunc(), OperandMIPS32FCC::FCC0); in lowerFcmp() local
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 670 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in createCMovFP() local
2035 SDValue FCC0 = DAG.getRegister(Mips::FCC0, MVT::i32); in lowerBRCOND() local
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