1 #ifndef GOOGLE_BREAKPAD_COMMON_ANDROID_INCLUDE_ASM_MIPS_ASM_H 2 #define GOOGLE_BREAKPAD_COMMON_ANDROID_INCLUDE_ASM_MIPS_ASM_H 3 4 #if defined(__has_include_next) && __has_include_next(<asm/asm.h>) 5 #include_next <asm/asm.h> 6 #else 7 8 /**************************************************************************** 9 **************************************************************************** 10 *** 11 *** This header was automatically generated from a Linux kernel header 12 *** of the same name, to make information necessary for userspace to 13 *** call into the kernel available to libc. It contains only constants, 14 *** structures, and macros generated from the original header, and thus, 15 *** contains no copyrightable information. 16 *** 17 *** To edit the content of this header, modify the corresponding 18 *** source file (e.g. under external/kernel-headers/original/) then 19 *** run bionic/libc/kernel/tools/update_all.py 20 *** 21 *** Any manual change here will be lost the next time this script will 22 *** be run. You've been warned! 23 *** 24 **************************************************************************** 25 ****************************************************************************/ 26 27 #include <asm/sgidefs.h> 28 #ifndef CAT 29 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 30 #ifdef __STDC__ 31 #define __CAT(str1, str2) str1##str2 32 #else 33 #define __CAT(str1, str2) str1 str2 34 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 35 #endif 36 #define CAT(str1, str2) __CAT(str1, str2) 37 #endif 38 #ifdef __PIC__ 39 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 40 #define CPRESTORE(register) .cprestore register 41 #define CPADD(register) .cpadd register 42 #define CPLOAD(register) .cpload register 43 #else 44 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 45 #define CPRESTORE(register) 46 #define CPADD(register) 47 #define CPLOAD(register) 48 #endif 49 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 50 #define LEAF(symbol) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, 0, ra 51 #define NESTED(symbol, framesize, rpc) .globl symbol; .align 2; .type symbol, @function; .ent symbol, 0; symbol: .frame sp, framesize, rpc 52 #define END(function) .end function; .size function, .-function 53 #define EXPORT(symbol) .globl symbol; symbol: 54 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 55 #define FEXPORT(symbol) .globl symbol; .type symbol, @function; symbol: 56 #define ABS(symbol,value) .globl symbol; symbol = value 57 #define PANIC(msg) .set push; .set reorder; PTR_LA a0, 8f; jal panic; 9: b 9b; .set pop; TEXT(msg) 58 #define PRINT(string) 59 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 60 #define TEXT(msg) .pushsection .data; 8: .asciiz msg; .popsection; 61 #define TTABLE(string) .pushsection .text; .word 1f; .popsection .pushsection .data; 1: .asciiz string; .popsection 62 #define PREF(hint, addr) 63 #define PREFX(hint, addr) 64 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 65 #if _MIPS_ISA == _MIPS_ISA_MIPS1 66 #define MOVN(rd, rs, rt) .set push; .set reorder; beqz rt, 9f; move rd, rs; .set pop; 9: 67 #define MOVZ(rd, rs, rt) .set push; .set reorder; bnez rt, 9f; move rd, rs; .set pop; 9: 68 #endif 69 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 70 #if _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS3 71 #define MOVN(rd, rs, rt) .set push; .set noreorder; bnezl rt, 9f; move rd, rs; .set pop; 9: 72 #define MOVZ(rd, rs, rt) .set push; .set noreorder; beqzl rt, 9f; move rd, rs; .set pop; 9: 73 #endif 74 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 75 #if _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS5 || _MIPS_ISA == _MIPS_ISA_MIPS32 || _MIPS_ISA == _MIPS_ISA_MIPS64 76 #define MOVN(rd, rs, rt) movn rd, rs, rt 77 #define MOVZ(rd, rs, rt) movz rd, rs, rt 78 #endif 79 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 80 #if _MIPS_SIM == _MIPS_SIM_ABI32 81 #define ALSZ 7 82 #define ALMASK ~7 83 #endif 84 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 85 #if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 86 #define ALSZ 15 87 #define ALMASK ~15 88 #endif 89 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 90 #ifdef __mips64 91 #define SZREG 8 92 #else 93 #define SZREG 4 94 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 95 #endif 96 #if _MIPS_SIM == _MIPS_SIM_ABI32 97 #define REG_S sw 98 #define REG_L lw 99 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 100 #define REG_SUBU subu 101 #define REG_ADDU addu 102 #endif 103 #if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 104 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 105 #define REG_S sd 106 #define REG_L ld 107 #define REG_SUBU dsubu 108 #define REG_ADDU daddu 109 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 110 #endif 111 #if _MIPS_SZINT == 32 112 #define INT_ADD add 113 #define INT_ADDU addu 114 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 115 #define INT_ADDI addi 116 #define INT_ADDIU addiu 117 #define INT_SUB sub 118 #define INT_SUBU subu 119 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 120 #define INT_L lw 121 #define INT_S sw 122 #define INT_SLL sll 123 #define INT_SLLV sllv 124 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 125 #define INT_SRL srl 126 #define INT_SRLV srlv 127 #define INT_SRA sra 128 #define INT_SRAV srav 129 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 130 #endif 131 #if _MIPS_SZINT == 64 132 #define INT_ADD dadd 133 #define INT_ADDU daddu 134 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 135 #define INT_ADDI daddi 136 #define INT_ADDIU daddiu 137 #define INT_SUB dsub 138 #define INT_SUBU dsubu 139 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 140 #define INT_L ld 141 #define INT_S sd 142 #define INT_SLL dsll 143 #define INT_SLLV dsllv 144 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 145 #define INT_SRL dsrl 146 #define INT_SRLV dsrlv 147 #define INT_SRA dsra 148 #define INT_SRAV dsrav 149 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 150 #endif 151 #if _MIPS_SZLONG == 32 152 #define LONG_ADD add 153 #define LONG_ADDU addu 154 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 155 #define LONG_ADDI addi 156 #define LONG_ADDIU addiu 157 #define LONG_SUB sub 158 #define LONG_SUBU subu 159 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 160 #define LONG_L lw 161 #define LONG_S sw 162 #define LONG_SLL sll 163 #define LONG_SLLV sllv 164 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 165 #define LONG_SRL srl 166 #define LONG_SRLV srlv 167 #define LONG_SRA sra 168 #define LONG_SRAV srav 169 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 170 #define LONG .word 171 #define LONGSIZE 4 172 #define LONGMASK 3 173 #define LONGLOG 2 174 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 175 #endif 176 #if _MIPS_SZLONG == 64 177 #define LONG_ADD dadd 178 #define LONG_ADDU daddu 179 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 180 #define LONG_ADDI daddi 181 #define LONG_ADDIU daddiu 182 #define LONG_SUB dsub 183 #define LONG_SUBU dsubu 184 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 185 #define LONG_L ld 186 #define LONG_S sd 187 #define LONG_SLL dsll 188 #define LONG_SLLV dsllv 189 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 190 #define LONG_SRL dsrl 191 #define LONG_SRLV dsrlv 192 #define LONG_SRA dsra 193 #define LONG_SRAV dsrav 194 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 195 #define LONG .dword 196 #define LONGSIZE 8 197 #define LONGMASK 7 198 #define LONGLOG 3 199 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 200 #endif 201 #if _MIPS_SZPTR == 32 202 #define PTR_ADD add 203 #define PTR_ADDU addu 204 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 205 #define PTR_ADDI addi 206 #define PTR_ADDIU addiu 207 #define PTR_SUB sub 208 #define PTR_SUBU subu 209 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 210 #define PTR_L lw 211 #define PTR_S sw 212 #define PTR_LA la 213 #define PTR_LI li 214 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 215 #define PTR_SLL sll 216 #define PTR_SLLV sllv 217 #define PTR_SRL srl 218 #define PTR_SRLV srlv 219 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 220 #define PTR_SRA sra 221 #define PTR_SRAV srav 222 #define PTR_SCALESHIFT 2 223 #define PTR .word 224 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 225 #define PTRSIZE 4 226 #define PTRLOG 2 227 #endif 228 #if _MIPS_SZPTR == 64 229 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 230 #define PTR_ADD dadd 231 #define PTR_ADDU daddu 232 #define PTR_ADDI daddi 233 #define PTR_ADDIU daddiu 234 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 235 #define PTR_SUB dsub 236 #define PTR_SUBU dsubu 237 #define PTR_L ld 238 #define PTR_S sd 239 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 240 #define PTR_LA dla 241 #define PTR_LI dli 242 #define PTR_SLL dsll 243 #define PTR_SLLV dsllv 244 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 245 #define PTR_SRL dsrl 246 #define PTR_SRLV dsrlv 247 #define PTR_SRA dsra 248 #define PTR_SRAV dsrav 249 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 250 #define PTR_SCALESHIFT 3 251 #define PTR .dword 252 #define PTRSIZE 8 253 #define PTRLOG 3 254 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 255 #endif 256 #if _MIPS_SIM == _MIPS_SIM_ABI32 257 #define MFC0 mfc0 258 #define MTC0 mtc0 259 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 260 #endif 261 #if _MIPS_SIM == _MIPS_SIM_NABI32 || _MIPS_SIM == _MIPS_SIM_ABI64 262 #define MFC0 dmfc0 263 #define MTC0 dmtc0 264 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 265 #endif 266 #define SSNOP sll zero, zero, 1 267 #define R10KCBARRIER(addr) 268 #endif // defined(__has_include_next) && __has_include_next(<asm/asm.h>) 269 #endif // GOOGLE_BREAKPAD_COMMON_ANDROID_INCLUDE_ASM_MIPS_ASM_H 270 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 271