1 /*
2 * Copyright (c) 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20 * THE SOFTWARE.
21 */
22
23 #ifndef __CLC_MATH_H_
24 #define __CLC_MATH_H_
25
26 #include "clc/clcfunc.h"
27 #include "clc/as_type.h"
28 #include "config.h"
29
30 #define SNAN 0x001
31 #define QNAN 0x002
32 #define NINF 0x004
33 #define NNOR 0x008
34 #define NSUB 0x010
35 #define NZER 0x020
36 #define PZER 0x040
37 #define PSUB 0x080
38 #define PNOR 0x100
39 #define PINF 0x200
40
41 #if (defined __AMDGCN__ || defined __R600__) && !defined __HAS_FMAF__
42 #define HAVE_HW_FMA32() (0)
43 #elif defined CLC_SPIRV || defined CLC_SPIRV64
44 bool __attribute__((noinline)) __clc_runtime_has_hw_fma32(void);
45 #define HAVE_HW_FMA32() __clc_runtime_has_hw_fma32()
46 #else
47 #define HAVE_HW_FMA32() (1)
48 #endif
49
50 #define HAVE_BITALIGN() (0)
51 #define HAVE_FAST_FMA32() (0)
52
53 #define MATH_DIVIDE(X, Y) ((X) / (Y))
54 #define MATH_RECIP(X) (1.0f / (X))
55 #define MATH_SQRT(X) sqrt(X)
56
57 #define SIGNBIT_SP32 0x80000000
58 #define EXSIGNBIT_SP32 0x7fffffff
59 #define EXPBITS_SP32 0x7f800000
60 #define MANTBITS_SP32 0x007fffff
61 #define ONEEXPBITS_SP32 0x3f800000
62 #define TWOEXPBITS_SP32 0x40000000
63 #define HALFEXPBITS_SP32 0x3f000000
64 #define IMPBIT_SP32 0x00800000
65 #define QNANBITPATT_SP32 0x7fc00000
66 #define INDEFBITPATT_SP32 0xffc00000
67 #define PINFBITPATT_SP32 0x7f800000
68 #define NINFBITPATT_SP32 0xff800000
69 #define EXPBIAS_SP32 127
70 #define EXPSHIFTBITS_SP32 23
71 #define BIASEDEMIN_SP32 1
72 #define EMIN_SP32 -126
73 #define BIASEDEMAX_SP32 254
74 #define EMAX_SP32 127
75 #define LAMBDA_SP32 1.0e30
76 #define MANTLENGTH_SP32 24
77 #define BASEDIGITS_SP32 7
78
__clc_flush_denormal_if_not_supported(float x)79 _CLC_OVERLOAD _CLC_INLINE float __clc_flush_denormal_if_not_supported(float x)
80 {
81 int ix = as_int(x);
82 if (!__clc_fp32_subnormals_supported() &&
83 ((ix & EXPBITS_SP32) == 0) && ((ix & MANTBITS_SP32) != 0)) {
84 ix &= SIGNBIT_SP32;
85 x = as_float(ix);
86 }
87 return x;
88 }
89
90 #ifdef cl_khr_fp64
91
92 #define SIGNBIT_DP64 0x8000000000000000L
93 #define EXSIGNBIT_DP64 0x7fffffffffffffffL
94 #define EXPBITS_DP64 0x7ff0000000000000L
95 #define MANTBITS_DP64 0x000fffffffffffffL
96 #define ONEEXPBITS_DP64 0x3ff0000000000000L
97 #define TWOEXPBITS_DP64 0x4000000000000000L
98 #define HALFEXPBITS_DP64 0x3fe0000000000000L
99 #define IMPBIT_DP64 0x0010000000000000L
100 #define QNANBITPATT_DP64 0x7ff8000000000000L
101 #define INDEFBITPATT_DP64 0xfff8000000000000L
102 #define PINFBITPATT_DP64 0x7ff0000000000000L
103 #define NINFBITPATT_DP64 0xfff0000000000000L
104 #define EXPBIAS_DP64 1023
105 #define EXPSHIFTBITS_DP64 52
106 #define BIASEDEMIN_DP64 1
107 #define EMIN_DP64 -1022
108 #define BIASEDEMAX_DP64 2046 /* 0x7fe */
109 #define EMAX_DP64 1023 /* 0x3ff */
110 #define LAMBDA_DP64 1.0e300
111 #define MANTLENGTH_DP64 53
112 #define BASEDIGITS_DP64 15
113
114 #endif // cl_khr_fp64
115
116 #define ALIGNED(x) __attribute__((aligned(x)))
117 #endif // __CLC_MATH_H_
118