| /external/llvm-project/clang/test/SemaCXX/ |
| D | warn-bitfield-enum-conversion.cpp | 4 enum TwoBits { Hi1 = 3 } two_bits; enumerator
|
| /external/rust/crates/gdbstub/src/arch/mips/reg/ |
| D | id.rs | 28 Hi1, enumerator
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVAsmBackend.cpp | 207 unsigned Hi1 = (Value >> 11) & 0x1; in adjustFixupValue() local
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| /external/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
| D | RISCVAsmBackend.cpp | 271 unsigned Hi1 = (Value >> 11) & 0x1; in adjustFixupValue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 750 SDValue Hi1 = Node->getOperand(1); in trySelect() local
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelDAGToDAG.cpp | 750 SDValue Hi1 = Node->getOperand(1); in trySelect() local
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 595 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
|
| D | SIISelLowering.cpp | 2106 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); in LowerSELECT() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 344 MachineOperand Hi1(getSubOperand64(I.getOperand(1), HalfRC, AMDGPU::sub1)); in selectG_ADD_SUB() local
|
| D | AMDGPUISelDAGToDAG.cpp | 1018 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
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| D | SIISelLowering.cpp | 3998 SDValue Lo1, Hi1; in splitBinaryVectorOp() local
4019 SDValue Lo1, Hi1; in splitTernaryVectorOp() local
7533 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); in LowerSELECT() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1048 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, in SelectADD_SUB_I64() local
|
| D | SIISelLowering.cpp | 4479 SDValue Lo1, Hi1; in splitBinaryVectorOp() local
4500 SDValue Lo1, Hi1; in splitTernaryVectorOp() local
8198 SDValue Hi1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, RHS, One); in LowerSELECT() local
|
| D | AMDGPUInstructionSelector.cpp | 354 MachineOperand Hi1(getSubOperand64(I.getOperand(1), HalfRC, AMDGPU::sub1)); in selectG_ADD_SUB() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 1995 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2610 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorTypes.cpp | 2762 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes; in SplitVecOp_VSETCC() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 6450 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8374 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 8680 ConstantSDNode *Hi1 = dyn_cast<ConstantSDNode>(BVN->getOperand(HiElt+2)); in isExtendedBUILD_VECTOR() local
|
| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 19626 SDValue Hi1 = extract128BitVector(Op1, NumElems / 2, DAG, dl); in LowerMUL_LOHI() local
|