Searched defs:HiHalf (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 5328 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1).add(SrcReg0Sub1); in splitScalar64BitUnaryOp() local
5396 MachineInstr *HiHalf = in splitScalar64BitAddSub() local
5465 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1) in splitScalar64BitBinaryOp() local
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| D | SILoadStoreOptimizer.cpp | 1622 MachineInstr *HiHalf = in computeBase() local
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| D | SIISelLowering.cpp | 4826 SDValue HiHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BCVec, in lowerINSERT_VECTOR_ELT() local
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 6060 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1).add(SrcReg0Sub1); in splitScalar64BitUnaryOp() local
6128 MachineInstr *HiHalf = in splitScalar64BitAddSub() local
6197 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1) in splitScalar64BitBinaryOp() local
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| D | SILoadStoreOptimizer.cpp | 1686 MachineInstr *HiHalf = in computeBase() local
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| D | SIISelLowering.cpp | 3967 MachineInstr *HiHalf = in EmitInstrWithCustomInserter() local
5413 SDValue HiHalf = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BCVec, in lowerINSERT_VECTOR_ELT() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2794 MachineInstr &HiHalf = *BuildMI(MBB, MII, DL, InstDesc, DestSub1) in splitScalar64BitBinaryOp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAGHVX.cpp | 648 HiHalf = 0x40000000, enumerator
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonISelDAGToDAGHVX.cpp | 648 HiHalf = 0x40000000, enumerator
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 4828 Register HiHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D() local
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