1 /************************************************************************** 2 * 3 * Copyright 2008 Dennis Smit 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * on the rights to use, copy, modify, merge, publish, distribute, sub 10 * license, and/or sell copies of the Software, and to permit persons to whom 11 * the Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the next 14 * paragraph) shall be included in all copies or substantial portions of the 15 * Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 23 * USE OR OTHER DEALINGS IN THE SOFTWARE. 24 * 25 ***************************************************************************/ 26 27 /** 28 * @file 29 * CPU feature detection. 30 * 31 * @author Dennis Smit 32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org> 33 */ 34 35 #ifndef _UTIL_CPU_DETECT_H 36 #define _UTIL_CPU_DETECT_H 37 38 39 #include "pipe/p_config.h" 40 #include "util/u_thread.h" 41 42 43 #ifdef __cplusplus 44 extern "C" { 45 #endif 46 47 enum cpu_family { 48 CPU_UNKNOWN, 49 50 CPU_AMD_ZEN1_ZEN2, 51 CPU_AMD_ZEN_HYGON, 52 CPU_AMD_ZEN3, 53 CPU_AMD_LAST, 54 }; 55 56 typedef uint32_t util_affinity_mask[UTIL_MAX_CPUS / 32]; 57 58 struct util_cpu_caps { 59 int nr_cpus; 60 enum cpu_family family; 61 62 /* Feature flags */ 63 int x86_cpu_type; 64 unsigned cacheline; 65 66 unsigned has_intel:1; 67 unsigned has_tsc:1; 68 unsigned has_mmx:1; 69 unsigned has_mmx2:1; 70 unsigned has_sse:1; 71 unsigned has_sse2:1; 72 unsigned has_sse3:1; 73 unsigned has_ssse3:1; 74 unsigned has_sse4_1:1; 75 unsigned has_sse4_2:1; 76 unsigned has_popcnt:1; 77 unsigned has_avx:1; 78 unsigned has_avx2:1; 79 unsigned has_f16c:1; 80 unsigned has_fma:1; 81 unsigned has_3dnow:1; 82 unsigned has_3dnow_ext:1; 83 unsigned has_xop:1; 84 unsigned has_altivec:1; 85 unsigned has_vsx:1; 86 unsigned has_daz:1; 87 unsigned has_neon:1; 88 89 unsigned has_avx512f:1; 90 unsigned has_avx512dq:1; 91 unsigned has_avx512ifma:1; 92 unsigned has_avx512pf:1; 93 unsigned has_avx512er:1; 94 unsigned has_avx512cd:1; 95 unsigned has_avx512bw:1; 96 unsigned has_avx512vl:1; 97 unsigned has_avx512vbmi:1; 98 99 unsigned num_L3_caches; 100 unsigned cores_per_L3; 101 102 uint16_t cpu_to_L3[UTIL_MAX_CPUS]; 103 /* Affinity masks for each L3 cache. */ 104 util_affinity_mask *L3_affinity_mask; 105 }; 106 107 extern struct util_cpu_caps 108 util_cpu_caps; 109 110 void util_cpu_detect(void); 111 112 113 #ifdef __cplusplus 114 } 115 #endif 116 117 118 #endif /* _UTIL_CPU_DETECT_H */ 119