| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSelect.cpp | 1103 Value *LHS, *RHS, *LHS2, *RHS2; in visitSelectInst() local
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| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 565 SDValue LHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_1, in getAVRCmp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 566 SDValue LHS2 = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i16, LHS_1, in getAVRCmp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSelect.cpp | 2544 Value *LHS2, *RHS2; in visitSelectInst() local
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| D | InstCombineCompares.cpp | 2645 Value *LHS2, *RHS2; in matchThreeWayIntCompare() local
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| /external/llvm-project/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineSelect.cpp | 2800 Value *LHS2, *RHS2; in visitSelectInst() local
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| D | InstCombineCompares.cpp | 2688 Value *LHS2, *RHS2; in matchThreeWayIntCompare() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 3782 SDValue LHS2 = Op2.getOperand(0); in isSaturatingConditional() local 4044 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local 8355 unsigned LHS2 = MI.getOperand(2).getReg(); in EmitInstrWithCustomInserter() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Analysis/ |
| D | ValueTracking.cpp | 2416 const Value *LHS2 = nullptr, *RHS2 = nullptr; in isSignedMinMaxClamp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 4785 SDValue LHS2 = Op2.getOperand(0); in isSaturatingConditional() local 5193 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local 10695 Register LHS2 = MI.getOperand(2).getReg(); in EmitInstrWithCustomInserter() local
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| /external/llvm-project/llvm/lib/Analysis/ |
| D | ValueTracking.cpp | 2610 const Value *LHS2 = nullptr, *RHS2 = nullptr; in isSignedMinMaxClamp() local
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| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 5440 SDValue LHS1, LHS2; in OptimizeVFPBrcond() local 11134 Register LHS2 = MI.getOperand(2).getReg(); in EmitInstrWithCustomInserter() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 15119 SDValue LHS2 = extract128BitVector(LHS, NumElems / 2, DAG, dl); in Lower256IntVSETCC() local 19223 SDValue LHS2 = extract128BitVector(LHS, NumElems / 2, DAG, dl); in Lower256IntArith() local 19252 SDValue LHS2 = extract256BitVector(LHS, NumElems / 2, DAG, dl); in Lower512IntArith() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 21227 SDValue LHS2 = extract128BitVector(LHS, NumElems / 2, DAG, dl); in Lower256IntVSETCC() local 25696 SDValue LHS2 = extract128BitVector(LHS, NumElems / 2, DAG, dl); in split256IntArith() local 25725 SDValue LHS2 = extract256BitVector(LHS, NumElems / 2, DAG, dl); in split512IntArith() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 6012 SDValue LHS1, LHS2; in splitVectorIntBinary() local 22455 SDValue LHS1, LHS2; in splitIntVSETCC() local
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