Searched defs:LoRegList (Results 1 – 5 of 5) sorted by relevance
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.cpp | 115 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64() local
144 static const MCPhysReg LoRegList[] = { PPC::R4 }; in CC_PPC32_SPE_RetF64() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.cpp | 115 static const MCPhysReg LoRegList[] = { PPC::R4, PPC::R6, PPC::R8, PPC::R10 }; in CC_PPC32_SPE_CustomSplitFP64() local
144 static const MCPhysReg LoRegList[] = { PPC::R4 }; in CC_PPC32_SPE_RetF64() local
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.h | 75 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64AssignAAPCS() local
127 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64RetAssign() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.cpp | 68 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64AssignAAPCS() local
120 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64RetAssign() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.cpp | 66 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64AssignAAPCS() local
117 static const MCPhysReg LoRegList[] = { ARM::R1, ARM::R3 }; in f64RetAssign() local
|