| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | MVETailPredUtils.h | 84 MachineInstrBuilder MIB = variable
114 MachineInstrBuilder MIB = variable
138 MachineInstrBuilder MIB = variable
147 MachineInstrBuilder MIB = variable
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| D | ARMExpandPseudoInsts.cpp | 510 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD() local
621 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST() local
698 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp() local
783 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL() local
1579 MachineInstrBuilder MIB = in ExpandCMP_SWAP() local
1592 MachineInstrBuilder MIB; in ExpandCMP_SWAP() local
1660 static void addExclusiveRegPair(MachineInstrBuilder &MIB, MachineOperand &Reg, in addExclusiveRegPair()
1709 MachineInstrBuilder MIB; in ExpandCMP_SWAP_64() local
1954 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in ExpandMI() local
2275 MachineInstrBuilder MIB = in ExpandMI() local
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| D | ThumbRegisterInfo.cpp | 171 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmInReg() local
311 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg); in emitThumbRegPlusImmediate() local
328 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg); in emitThumbRegPlusImmediate() local
367 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in rewriteFrameIndex() local
463 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in eliminateFrameIndex() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 124 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
143 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
148 addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) { in addOffset()
157 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
164 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
172 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
223 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, in addConstantPoolReference()
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| D | X86FixupBWInsts.cpp | 297 MachineInstrBuilder MIB = in tryReplaceLoad() local
332 MachineInstrBuilder MIB = in tryReplaceCopy() local
360 MachineInstrBuilder MIB = in tryReplaceExtend() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 124 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
143 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
148 addOffset(const MachineInstrBuilder &MIB, const MachineOperand& Offset) { in addOffset()
157 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
164 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
172 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
223 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, in addConstantPoolReference()
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| D | X86FixupBWInsts.cpp | 298 MachineInstrBuilder MIB = in tryReplaceLoad() local
333 MachineInstrBuilder MIB = in tryReplaceCopy() local
361 MachineInstrBuilder MIB = in tryReplaceExtend() local
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| D | X86CallLowering.cpp | 141 auto MIB = MIRBuilder.buildAnyExt(LLT::scalar(PhysRegSize), ValVReg); in assignValueToReg() local
178 MachineInstrBuilder &MIB; member
192 auto MIB = MIRBuilder.buildInstrNoInsert(X86::RET).addImm(0); in lowerReturn() local
322 MachineInstrBuilder &MIB; member
403 auto MIB = MIRBuilder.buildInstrNoInsert(CallOpc) in lowerCall() local
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrBuilder.h | 119 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { in addDirectMem()
127 addOffset(const MachineInstrBuilder &MIB, int Offset) { in addOffset()
136 addRegOffset(const MachineInstrBuilder &MIB, in addRegOffset()
143 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, in addRegReg()
151 addFullAddress(const MachineInstrBuilder &MIB, in addFullAddress()
202 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, in addConstantPoolReference()
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| D | X86ExpandPseudo.cpp | 112 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI() local
125 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op)); in ExpandMI() local
171 MachineInstrBuilder MIB; in ExpandMI() local
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CSEMIRBuilder.cpp | 120 MachineInstrBuilder CSEMIRBuilder::memoizeMI(MachineInstrBuilder MIB, in memoizeMI()
141 MachineInstrBuilder &MIB) { in generateCopiesIfRequired()
213 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() local
223 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildInstr() local
251 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildConstant() local
278 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildFConstant() local
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| D | MachineIRBuilder.cpp | 41 MachineInstrBuilder MIB = BuildMI(getMF(), getDL(), getTII().get(Opcode)); in buildInstrNoInsert() local
45 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr()
100 auto MIB = buildInstrNoInsert(TargetOpcode::DBG_VALUE); in buildConstDbgValue() local
121 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel() local
130 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc() local
140 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex() local
153 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue() local
324 auto MIB = buildInstr(TargetOpcode::G_BRCOND); in buildBrCond() local
352 auto MIB = buildInstr(Opcode); in buildLoadInstr() local
382 auto MIB = buildInstr(TargetOpcode::G_STORE); in buildStore() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | CSEMIRBuilder.cpp | 105 MachineInstrBuilder CSEMIRBuilder::memoizeMI(MachineInstrBuilder MIB, in memoizeMI()
126 MachineInstrBuilder &MIB) { in generateCopiesIfRequired()
183 auto MIB = MachineIRBuilder::buildInstr(Opc, DstOps, SrcOps, Flag); in buildInstr() local
193 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildInstr() local
221 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildConstant() local
248 MachineInstrBuilder MIB = getDominatingInstrForID(ID, InsertPos); in buildFConstant() local
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| D | MachineIRBuilder.cpp | 79 MachineInstrBuilder MIB = BuildMI(getMF(), getDL(), getTII().get(Opcode)); in buildInstrNoInsert() local
83 MachineInstrBuilder MachineIRBuilder::insertInstr(MachineInstrBuilder MIB) { in insertInstr()
138 auto MIB = buildInstr(TargetOpcode::DBG_VALUE); in buildConstDbgValue() local
158 auto MIB = buildInstr(TargetOpcode::DBG_LABEL); in buildDbgLabel() local
167 auto MIB = buildInstr(TargetOpcode::G_DYN_STACKALLOC); in buildDynStackAlloc() local
177 auto MIB = buildInstr(TargetOpcode::G_FRAME_INDEX); in buildFrameIndex() local
190 auto MIB = buildInstr(TargetOpcode::G_GLOBAL_VALUE); in buildGlobalValue() local
246 auto MIB = buildInstr(TargetOpcode::G_PTR_MASK); in buildPtrMask() local
373 auto MIB = buildInstr(Opcode); in buildLoadInstr() local
386 auto MIB = buildInstr(TargetOpcode::G_STORE); in buildStore() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 479 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD() local
590 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST() local
667 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp() local
752 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL() local
954 MachineInstrBuilder MIB = in ExpandCMP_SWAP() local
967 MachineInstrBuilder MIB; in ExpandCMP_SWAP() local
1035 static void addExclusiveRegPair(MachineInstrBuilder &MIB, MachineOperand &Reg, in addExclusiveRegPair()
1084 MachineInstrBuilder MIB; in ExpandCMP_SWAP_64() local
1182 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in ExpandMI() local
1397 MachineInstrBuilder MIB = in ExpandMI() local
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| D | ThumbRegisterInfo.cpp | 172 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg); in emitThumbRegPlusImmInReg() local
312 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(CopyOpc), DestReg); in emitThumbRegPlusImmediate() local
329 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(ExtraOpc), DestReg); in emitThumbRegPlusImmediate() local
368 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in rewriteFrameIndex() local
464 MachineInstrBuilder MIB(*MBB.getParent(), &MI); in eliminateFrameIndex() local
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| /external/llvm/lib/Target/ARM/ |
| D | ARMExpandPseudoInsts.cpp | 401 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVLD() local
466 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandVST() local
520 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), in ExpandLaneOp() local
604 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc)); in ExpandVTBL() local
792 MachineInstrBuilder MIB = in ExpandCMP_SWAP() local
809 MachineInstrBuilder MIB; in ExpandCMP_SWAP() local
869 static void addExclusiveRegPair(MachineInstrBuilder &MIB, MachineOperand &Reg, in addExclusiveRegPair()
924 MachineInstrBuilder MIB; in ExpandCMP_SWAP_64() local
1017 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode)); in ExpandMI() local
1216 MachineInstrBuilder MIB = in ExpandMI() local
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| D | ARMBaseInstrInfo.h | 399 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) { in AddDefaultPred()
404 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) { in AddDefaultCC()
415 const MachineInstrBuilder &AddNoT1CC(const MachineInstrBuilder &MIB) { in AddNoT1CC()
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| D | Thumb2InstrInfo.cpp | 156 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2STRDi8)); in storeRegToStackSlot() local
198 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(ARM::t2LDRDi8)); in loadRegFromStackSlot() local
337 MachineInstrBuilder MIB = in emitT2RegPlusImmediate() local
476 MachineInstrBuilder MIB(*MI.getParent()->getParent(), &MI); in rewriteT2FrameIndex() local
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| /external/rust/crates/getrandom/src/ |
| D | bsd_arandom.rs | 14 static MIB: [libc::c_int; 2] = [libc::CTL_KERN, libc::KERN_ARND]; in kern_arnd() constant
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.h | 275 void renderTruncTImm1(MachineInstrBuilder &MIB, const MachineInstr &MI, in renderTruncTImm1()
280 void renderTruncTImm8(MachineInstrBuilder &MIB, const MachineInstr &MI, in renderTruncTImm8()
285 void renderTruncTImm16(MachineInstrBuilder &MIB, const MachineInstr &MI, in renderTruncTImm16()
290 void renderTruncTImm32(MachineInstrBuilder &MIB, const MachineInstr &MI, in renderTruncTImm32()
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 193 MachineInstrBuilder &MIB, in CreateVirtualRegisters()
299 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB, in AddRegisterOperand()
370 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB, in AddOperand()
578 MachineInstrBuilder MIB = in EmitSubregNode() local
635 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence() local
691 auto MIB = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE)); in EmitDbgValue() local
719 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgValue() local
806 auto MIB = BuildMI(*MF, DL, RefII); in EmitDbgInstrRef() local
835 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgLabel() local
913 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II); in EmitMachineNode() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | InstrEmitter.cpp | 190 MachineInstrBuilder &MIB, in CreateVirtualRegisters()
291 InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB, in AddRegisterOperand()
362 void InstrEmitter::AddOperand(MachineInstrBuilder &MIB, in AddOperand()
578 MachineInstrBuilder MIB = in EmitSubregNode() local
635 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II, NewVReg); in EmitRegSequence() local
691 auto MIB = BuildMI(*MF, DL, TII->get(TargetOpcode::DBG_VALUE)); in EmitDbgValue() local
714 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgValue() local
773 MachineInstrBuilder MIB = BuildMI(*MF, DL, II); in EmitDbgLabel() local
846 MachineInstrBuilder MIB = BuildMI(*MF, Node->getDebugLoc(), II); in EmitMachineNode() local
1055 MachineInstrBuilder MIB = in EmitSpecialNode() local
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 782 MachineIRBuilder MIB(I); in copySubReg() local
888 MachineIRBuilder MIB(I); in selectCopy() local
1611 MachineIRBuilder MIB(I); in selectCompareBranch() local
1734 MachineIRBuilder MIB(I); in selectVectorSHL() local
1796 MachineIRBuilder MIB(I); in selectVectorAshrLshr() local
1817 auto MIB = in selectVaStartDarwin() local
1842 MachineIRBuilder MIB(I); in materializeLargeCMVal() local
1904 MachineIRBuilder MIB(I); in preISelLower() local
1933 MachineIRBuilder MIB(I); in preISelLower() local
1963 MachineIRBuilder MIB(I); in convertPtrAddToAdd() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 625 MachineIRBuilder MIB(I); in selectSubregisterCopy() local
999 MachineIRBuilder MIB(I); in selectCompareBranch() local
1124 MachineIRBuilder MIB(I); in selectVectorSHL() local
1170 MachineIRBuilder MIB(I); in selectVectorASHR() local
1191 auto MIB = in selectVaStartDarwin() local
1216 MachineIRBuilder MIB(I); in materializeLargeCMVal() local
1278 MachineIRBuilder MIB(I); in preISelLower() local
1311 MachineIRBuilder MIB(I); in earlySelectSHL() local
1487 MachineIRBuilder MIB(I); in select() local
1512 auto MIB = BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::TBNZW)) in select() local
[all …]
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