| /external/tensorflow/tensorflow/lite/kernels/ |
| D | kernel_util.h | 156 inline int NumIntermediates(const TfLiteNode* node) { in NumIntermediates() function
|
| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1116 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT()
1439 unsigned NumIntermediates; in computeRegisterProperties() local
1502 unsigned &NumIntermediates, in getVectorTypeBreakdown()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 938 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT()
1312 unsigned NumIntermediates; in computeRegisterProperties() local
1377 unsigned &NumIntermediates, in getVectorTypeBreakdown()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 1069 unsigned &NumIntermediates, in getVectorTypeBreakdownMVT()
1467 unsigned NumIntermediates; in computeRegisterProperties() local
1534 unsigned &NumIntermediates, in getVectorTypeBreakdown()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 838 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
1292 unsigned NumIntermediates; in getRegisterType() local
1320 unsigned NumIntermediates; in getNumRegisters() local
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetLowering.h | 973 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
1448 unsigned NumIntermediates; in getRegisterType() local
1476 unsigned NumIntermediates; in getNumRegisters() local
|
| /external/llvm/include/llvm/Target/ |
| D | TargetLowering.h | 843 unsigned NumIntermediates; in getRegisterType() local
871 unsigned NumIntermediates; in getNumRegisters() local
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 288 unsigned NumIntermediates; in getCopyFromPartsVector() local
574 unsigned NumIntermediates; in getCopyToPartsVector() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 133 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.cpp | 133 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 341 unsigned NumIntermediates; in getCopyFromPartsVector() local
689 unsigned NumIntermediates; in getCopyToPartsVector() local
|
| D | SelectionDAG.cpp | 2064 unsigned NumIntermediates; in getReducedAlign() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGBuilder.cpp | 376 unsigned NumIntermediates; in getCopyFromPartsVector() local
710 unsigned NumIntermediates; in getCopyToPartsVector() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 846 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 970 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2138 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|
| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 2153 unsigned &NumIntermediates, MVT &RegisterVT) const { in getVectorTypeBreakdownForCallingConv()
|