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Searched defs:OffsetReg (Results 1 – 25 of 57) sorted by relevance

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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyFrameLowering.cpp159 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
200 unsigned OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyFrameLowering.cpp193 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
247 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
/external/llvm-project/llvm/lib/Target/WebAssembly/
DWebAssemblyFrameLowering.cpp248 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
300 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
/external/llvm-project/llvm/lib/Target/AMDGPU/
DSIFrameLowering.cpp183 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildPrologSpill() local
199 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildPrologSpill() local
247 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildEpilogReload() local
279 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildEpilogReload() local
DR600InstrInfo.cpp1041 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1055 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1124 unsigned OffsetReg, in buildIndirectWrite()
1156 unsigned OffsetReg, in buildIndirectRead()
DAMDGPUCallLowering.cpp224 auto OffsetReg = MIRBuilder.buildConstant(S32, Offset); in getStackAddress() local
509 auto OffsetReg = B.buildConstant(LLT::scalar(64), Offset); in lowerParameterPtr() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp1040 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1054 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1123 unsigned OffsetReg, in buildIndirectWrite()
1155 unsigned OffsetReg, in buildIndirectRead()
DSIFrameLowering.cpp120 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildPrologSpill() local
167 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildEpilogReload() local
/external/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp1059 unsigned OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1073 unsigned OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1143 unsigned OffsetReg, in buildIndirectWrite()
1175 unsigned OffsetReg, in buildIndirectRead()
DSIRegisterInfo.cpp293 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in materializeFrameBaseRegister() local
346 unsigned OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); in resolveFrameIndex() local
/external/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp540 unsigned OffsetReg = MI.getOperand(FrameRegIdx+1).getReg(); in rewriteT2FrameIndex() local
DThumb2SizeReduction.cpp528 unsigned OffsetReg = 0; in ReduceLoadStore() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp566 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); in rewriteT2FrameIndex() local
DARMCallLowering.cpp105 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp130 unsigned OffsetReg; member
624 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
/external/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp115 unsigned OffsetReg; member
608 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
/external/llvm-project/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp132 unsigned OffsetReg; member
626 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
/external/llvm-project/llvm/lib/Target/X86/
DX86CallLowering.cpp113 auto OffsetReg = MIRBuilder.buildConstant(SType, Offset); in getStackAddress() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallLowering.cpp114 Register OffsetReg = MRI.createGenericVirtualRegister(SType); in getStackAddress() local
/external/llvm-project/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp613 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); in rewriteT2FrameIndex() local
DARMCallLowering.cpp103 auto OffsetReg = MIRBuilder.buildConstant(s32, Offset); in getStackAddress() local
/external/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp715 unsigned OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp881 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
/external/llvm-project/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp895 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
/external/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp147 unsigned OffsetReg = MI->getOperand(2).getReg(); in canRemoveAddasl() local

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