| /external/capstone/arch/XCore/ |
| D | XCoreDisassembler.c | 195 static DecodeStatus Decode2OpInstruction(unsigned Insn, unsigned *Op1, unsigned *Op2) in Decode2OpInstruction()
219 unsigned *Op1, unsigned *Op2, unsigned *Op3) in Decode3OpInstruction()
312 unsigned Op1, Op2; in Decode2RInstruction() local
326 unsigned Op1, Op2; in Decode2RImmInstruction() local
340 unsigned Op1, Op2; in DecodeR2RInstruction() local
354 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
369 unsigned Op1, Op2; in DecodeRUSInstruction() local
383 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
397 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
484 unsigned Op1, Op2; in DecodeL2RInstruction() local
[all …]
|
| /external/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 241 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
259 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
347 unsigned Op1, Op2; in Decode2RInstruction() local
360 unsigned Op1, Op2; in Decode2RImmInstruction() local
373 unsigned Op1, Op2; in DecodeR2RInstruction() local
386 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
400 unsigned Op1, Op2; in DecodeRUSInstruction() local
413 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
426 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
511 unsigned Op1, Op2; in DecodeL2RInstruction() local
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 240 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
258 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
346 unsigned Op1, Op2; in Decode2RInstruction() local
359 unsigned Op1, Op2; in Decode2RImmInstruction() local
372 unsigned Op1, Op2; in DecodeR2RInstruction() local
385 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
399 unsigned Op1, Op2; in DecodeRUSInstruction() local
412 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
425 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
510 unsigned Op1, Op2; in DecodeL2RInstruction() local
[all …]
|
| /external/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| D | XCoreDisassembler.cpp | 240 Decode2OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2) { in Decode2OpInstruction()
258 Decode3OpInstruction(unsigned Insn, unsigned &Op1, unsigned &Op2, in Decode3OpInstruction()
346 unsigned Op1, Op2; in Decode2RInstruction() local
359 unsigned Op1, Op2; in Decode2RImmInstruction() local
372 unsigned Op1, Op2; in DecodeR2RInstruction() local
385 unsigned Op1, Op2; in Decode2RSrcDstInstruction() local
399 unsigned Op1, Op2; in DecodeRUSInstruction() local
412 unsigned Op1, Op2; in DecodeRUSBitpInstruction() local
425 unsigned Op1, Op2; in DecodeRUSSrcDstBitpInstruction() local
510 unsigned Op1, Op2; in DecodeL2RInstruction() local
[all …]
|
| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGTargetInfo.h | 51 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
67 SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, in EmitTargetCodeForMemmove()
80 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemset()
92 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp()
129 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGTargetInfo.h | 53 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
69 SDValue Op2, SDValue Op3, Align Alignment, bool isVolatile, in EmitTargetCodeForMemmove()
82 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemset()
94 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp()
131 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | SelectionDAGTargetInfo.h | 53 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcpy()
69 SDValue Op2, SDValue Op3, unsigned Align, bool isVolatile, in EmitTargetCodeForMemmove()
82 SDValue Op2, SDValue Op3, in EmitTargetCodeForMemset()
94 SDValue Op1, SDValue Op2, SDValue Op3, in EmitTargetCodeForMemcmp()
131 SDValue Op1, SDValue Op2, in EmitTargetCodeForStrcmp()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 142 const MCOperand Op2 = Inst.getOperand(2); in adjustPqBits() local
190 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRiMemoryOpValue() local
222 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRrMemoryOpValue() local
261 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getSplsOpValue() local
|
| /external/llvm-project/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 142 const MCOperand Op2 = Inst.getOperand(2); in adjustPqBits() local
190 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRiMemoryOpValue() local
222 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRrMemoryOpValue() local
261 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getSplsOpValue() local
|
| /external/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiMCCodeEmitter.cpp | 145 const MCOperand Op2 = Inst.getOperand(2); in adjustPqBits() local
193 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRiMemoryOpValue() local
225 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getRrMemoryOpValue() local
264 const MCOperand Op2 = Inst.getOperand(OpNo + 1); in getSplsOpValue() local
|
| /external/llvm-project/llvm/unittests/Transforms/Vectorize/ |
| D | VPlanTest.cpp | 362 VPValue Op2; in TEST() local
377 VPValue Op2; in TEST() local
396 VPValue Op2; in TEST() local
416 VPValue Op2; in TEST() local
439 VPValue Op2; in TEST() local
457 VPValue Op2; in TEST() local
484 VPValue Op2; in TEST() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandImm.h | 25 uint64_t Op2; member
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64ExpandImm.h | 25 uint64_t Op2; member
|
| /external/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 93 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
111 uint32_t Op2 = Bits & 0x7; in genericRegisterString() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | DFAPacketizer.cpp | 283 const MachineMemOperand &Op2, in alias()
308 for (const MachineMemOperand *Op2 : MI2.memoperands()) in alias() local
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | DFAPacketizer.cpp | 283 const MachineMemOperand &Op2, in alias()
308 for (const MachineMemOperand *Op2 : MI2.memoperands()) in alias() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 135 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
153 uint32_t Op2 = Bits & 0x7; in genericRegisterString() local
|
| /external/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.cpp | 135 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
153 uint32_t Op2 = Bits & 0x7; in genericRegisterString() local
|
| /external/llvm/lib/Target/Lanai/ |
| D | LanaiMemAluCombiner.cpp | 170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand()
295 MachineOperand &Op2 = AluIter->getOperand(2); in isSuitableAluInstr() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiMemAluCombiner.cpp | 170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand()
294 MachineOperand &Op2 = AluIter->getOperand(2); in isSuitableAluInstr() local
|
| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiMemAluCombiner.cpp | 170 bool isSameOperand(const MachineOperand &Op1, const MachineOperand &Op2) { in isSameOperand()
294 MachineOperand &Op2 = AluIter->getOperand(2); in isSuitableAluInstr() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblySelectionDAGInfo.cpp | 37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblySelectionDAGInfo.cpp | 37 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2, in EmitTargetCodeForMemmove()
|
| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 162 MCOperand Op2 = MI.getOperand(2); in getMemoryOpValue() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 166 MCOperand Op2 = MI.getOperand(2); in getMemoryOpValue() local
|