| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstMIPS32.cpp | 61 template <> const char *InstMIPS32Abs_d::Opcode = "abs.d"; member in Ice::MIPS32::InstMIPS32Abs_d
62 template <> const char *InstMIPS32Abs_s::Opcode = "abs.s"; member in Ice::MIPS32::InstMIPS32Abs_s
63 template <> const char *InstMIPS32Addi::Opcode = "addi"; member in Ice::MIPS32::InstMIPS32Addi
64 template <> const char *InstMIPS32Add::Opcode = "add"; member in Ice::MIPS32::InstMIPS32Add
65 template <> const char *InstMIPS32Add_d::Opcode = "add.d"; member in Ice::MIPS32::InstMIPS32Add_d
66 template <> const char *InstMIPS32Add_s::Opcode = "add.s"; member in Ice::MIPS32::InstMIPS32Add_s
67 template <> const char *InstMIPS32Addiu::Opcode = "addiu"; member in Ice::MIPS32::InstMIPS32Addiu
68 template <> const char *InstMIPS32Addu::Opcode = "addu"; member in Ice::MIPS32::InstMIPS32Addu
69 template <> const char *InstMIPS32And::Opcode = "and"; member in Ice::MIPS32::InstMIPS32And
70 template <> const char *InstMIPS32Andi::Opcode = "andi"; member in Ice::MIPS32::InstMIPS32Andi
[all …]
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| D | IceAssemblerMIPS32.cpp | 207 void AssemblerMIPS32::emitRsRt(IValueT Opcode, const Operand *OpRs, in emitRsRt()
218 void AssemblerMIPS32::emitRtRsImm16(IValueT Opcode, const Operand *OpRt, in emitRtRsImm16()
231 void AssemblerMIPS32::emitRtRsImm16Rel(IValueT Opcode, const Operand *OpRt, in emitRtRsImm16Rel()
255 void AssemblerMIPS32::emitFtRsImm16(IValueT Opcode, const Operand *OpFt, in emitFtRsImm16()
268 void AssemblerMIPS32::emitRdRtSa(IValueT Opcode, const Operand *OpRd, in emitRdRtSa()
281 void AssemblerMIPS32::emitRdRsRt(IValueT Opcode, const Operand *OpRd, in emitRdRsRt()
295 void AssemblerMIPS32::emitCOP1Fcmp(IValueT Opcode, FPInstDataFormat Format, in emitCOP1Fcmp()
309 void AssemblerMIPS32::emitCOP1FmtFsFd(IValueT Opcode, FPInstDataFormat Format, in emitCOP1FmtFsFd()
322 void AssemblerMIPS32::emitCOP1FmtFtFsFd(IValueT Opcode, FPInstDataFormat Format, in emitCOP1FmtFtFsFd()
339 void AssemblerMIPS32::emitCOP1FmtRtFsFd(IValueT Opcode, FPInstDataFormat Format, in emitCOP1FmtRtFsFd()
[all …]
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| D | IceInstARM32.cpp | 106 void InstARM32Pred::dumpOpcodePred(Ostream &Str, const char *Opcode, in dumpOpcodePred()
157 void InstARM32Pred::emitUnaryopGPR(const char *Opcode, in emitUnaryopGPR()
172 void InstARM32Pred::emitUnaryopFP(const char *Opcode, FPSign Sign, in emitUnaryopFP()
195 void InstARM32Pred::emitTwoAddr(const char *Opcode, const InstARM32Pred *Instr, in emitTwoAddr()
209 void InstARM32Pred::emitThreeAddr(const char *Opcode, in emitThreeAddr()
225 void InstARM32::emitThreeAddrFP(const char *Opcode, FPSign SignType, in emitThreeAddrFP()
240 void InstARM32::emitFourAddrFP(const char *Opcode, FPSign SignType, in emitFourAddrFP()
256 void InstARM32Pred::emitFourAddr(const char *Opcode, const InstARM32Pred *Instr, in emitFourAddr()
308 void InstARM32Pred::emitCmpLike(const char *Opcode, const InstARM32Pred *Instr, in emitCmpLike()
1818 template <> const char *InstARM32Movt::Opcode = "movt"; member in Ice::ARM32::InstARM32Movt
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 187 bool isSALU(uint16_t Opcode) const { in isSALU()
195 bool isVALU(uint16_t Opcode) const { in isVALU()
203 bool isVMEM(uint16_t Opcode) const { in isVMEM()
211 bool isSOP1(uint16_t Opcode) const { in isSOP1()
219 bool isSOP2(uint16_t Opcode) const { in isSOP2()
227 bool isSOPC(uint16_t Opcode) const { in isSOPC()
235 bool isSOPK(uint16_t Opcode) const { in isSOPK()
243 bool isSOPP(uint16_t Opcode) const { in isSOPP()
251 bool isVOP1(uint16_t Opcode) const { in isVOP1()
259 bool isVOP2(uint16_t Opcode) const { in isVOP2()
[all …]
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 343 bool isSALU(uint16_t Opcode) const { in isSALU()
351 bool isVALU(uint16_t Opcode) const { in isVALU()
359 bool isVMEM(uint16_t Opcode) const { in isVMEM()
367 bool isSOP1(uint16_t Opcode) const { in isSOP1()
375 bool isSOP2(uint16_t Opcode) const { in isSOP2()
383 bool isSOPC(uint16_t Opcode) const { in isSOPC()
391 bool isSOPK(uint16_t Opcode) const { in isSOPK()
399 bool isSOPP(uint16_t Opcode) const { in isSOPP()
407 bool isPacked(uint16_t Opcode) const { in isPacked()
415 bool isVOP1(uint16_t Opcode) const { in isVOP1()
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.h | 337 bool isSALU(uint16_t Opcode) const { in isSALU()
345 bool isVALU(uint16_t Opcode) const { in isVALU()
353 bool isVMEM(uint16_t Opcode) const { in isVMEM()
361 bool isSOP1(uint16_t Opcode) const { in isSOP1()
369 bool isSOP2(uint16_t Opcode) const { in isSOP2()
377 bool isSOPC(uint16_t Opcode) const { in isSOPC()
385 bool isSOPK(uint16_t Opcode) const { in isSOPK()
393 bool isSOPP(uint16_t Opcode) const { in isSOPP()
401 bool isPacked(uint16_t Opcode) const { in isPacked()
409 bool isVOP1(uint16_t Opcode) const { in isVOP1()
[all …]
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| /external/llvm-project/lldb/source/Plugins/Instruction/PPC64/ |
| D | EmulateInstructionPPC64.h | 72 struct Opcode { struct
81 Opcode *GetOpcodeForInstruction(uint32_t opcode); argument
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| /external/llvm-project/llvm/unittests/tools/llvm-exegesis/X86/ |
| D | SnippetGeneratorTest.cpp | 50 std::vector<CodeTemplate> checkAndGetCodeTemplates(unsigned Opcode) { in checkAndGetCodeTemplates()
77 const unsigned Opcode = X86::ADC16i16; in TEST_F() local
103 const unsigned Opcode = X86::ADD16ri; in TEST_F() local
126 const unsigned Opcode = X86::VXORPSrr; in TEST_F() local
151 const unsigned Opcode = X86::VXORPSrr; in TEST_F() local
169 const unsigned Opcode = X86::CMP64rr; in TEST_F() local
190 const unsigned Opcode = X86::LAHF; in TEST_F() local
209 const unsigned Opcode = X86::VCVTUSI642SDZrrb_Int; in TEST_F() local
227 const unsigned Opcode = X86::BNDCL32rr; in TEST_F() local
248 const unsigned Opcode = X86::CDQ; in TEST_F() local
[all …]
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| /external/llvm/lib/CodeGen/GlobalISel/ |
| D | MachineIRBuilder.cpp | 59 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty) { in buildInstr()
72 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr()
77 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr()
88 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, unsigned Res, in buildInstr()
95 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode) { in buildInstr()
99 MachineInstr *MachineIRBuilder::buildInstr(unsigned Opcode, Type *Ty, in buildInstr()
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 141 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode()
155 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode()
165 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode()
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| /external/llvm-project/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 146 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode()
160 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode()
170 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiInstrInfo.h | 145 static inline bool isSPLSOpcode(unsigned Opcode) { in isSPLSOpcode()
159 static inline bool isRMOpcode(unsigned Opcode) { in isRMOpcode()
169 static inline bool isRRMOpcode(unsigned Opcode) { in isRRMOpcode()
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| /external/llvm/tools/llvm-readobj/ |
| D | ARMEHABIPrinter.h | 97 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
102 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
120 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
128 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
132 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
138 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
144 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
161 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
187 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_101101nn() local
[all …]
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| /external/llvm-project/lldb/include/lldb/Core/ |
| D | Opcode.h | 41 Opcode() : m_byte_order(lldb::eByteOrderInvalid), m_type(eTypeInvalid) {} in Opcode() function
43 Opcode(uint8_t inst, lldb::ByteOrder order) in Opcode() function
48 Opcode(uint16_t inst, lldb::ByteOrder order) in Opcode() function
53 Opcode(uint32_t inst, lldb::ByteOrder order) in Opcode() function
58 Opcode(uint64_t inst, lldb::ByteOrder order) in Opcode() function
63 Opcode(uint8_t *bytes, size_t length) in Opcode() function
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 74 void EmitInt8(unsigned Opcode) { in EmitInt8()
79 void EmitInt16(unsigned Opcode) { in EmitInt16()
85 void EmitBytes(const uint8_t *Opcode, size_t Size) { in EmitBytes()
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| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 72 void EmitInt8(unsigned Opcode) { in EmitInt8()
77 void EmitInt16(unsigned Opcode) { in EmitInt16()
83 void emitBytes(const uint8_t *Opcode, size_t Size) { in emitBytes()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMUnwindOpAsm.h | 72 void EmitInt8(unsigned Opcode) { in EmitInt8()
77 void EmitInt16(unsigned Opcode) { in EmitInt16()
83 void EmitBytes(const uint8_t *Opcode, size_t Size) { in EmitBytes()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 53 int ARMTTIImpl::getIntImmCodeSizeCost(unsigned Opcode, unsigned Idx, in getIntImmCodeSizeCost()
61 int ARMTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost()
76 int ARMTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { in getCastInstrCost()
269 int ARMTTIImpl::getVectorInstrCost(unsigned Opcode, Type *ValTy, in getVectorInstrCost()
294 int ARMTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) { in getCmpSelInstrCost()
412 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info, in getArithmeticInstrCost()
483 int ARMTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, in getMemoryOpCost()
496 int ARMTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, in getInterleavedMemoryOpCost()
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| /external/llvm-project/llvm/unittests/tools/llvm-exegesis/PowerPC/ |
| D | SnippetGeneratorTest.cpp | 39 std::vector<CodeTemplate> checkAndGetCodeTemplates(unsigned Opcode) { in checkAndGetCodeTemplates()
65 const unsigned Opcode = PPC::ADD8; in TEST_F() local
95 const unsigned Opcode = PPC::RLDIMI; in TEST_F() local
118 const unsigned Opcode = PPC::LDX; in TEST_F() local
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZShortenInst.cpp | 109 bool SystemZShortenInst::shortenOn0(MachineInstr &MI, unsigned Opcode) { in shortenOn0()
119 bool SystemZShortenInst::shortenOn01(MachineInstr &MI, unsigned Opcode) { in shortenOn01()
131 bool SystemZShortenInst::shortenOn001(MachineInstr &MI, unsigned Opcode) { in shortenOn001()
144 bool SystemZShortenInst::shortenOn001AddCC(MachineInstr &MI, unsigned Opcode) { in shortenOn001AddCC()
157 bool SystemZShortenInst::shortenFPConv(MachineInstr &MI, unsigned Opcode) { in shortenFPConv()
179 bool SystemZShortenInst::shortenFusedFPOp(MachineInstr &MI, unsigned Opcode) { in shortenFusedFPOp()
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| /external/llvm-project/llvm/tools/llvm-readobj/ |
| D | ARMEHABIPrinter.h | 99 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_00xxxxxx() local
105 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_01xxxxxx() local
124 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011101() local
129 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10011111() local
134 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_1001nnnn() local
139 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10100nnn() local
146 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10101nnn() local
153 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110000() local
170 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_10110010_uleb128() local
197 uint8_t Opcode = Opcodes[OI++ ^ 3]; in Decode_101101nn() local
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCTargetTransformInfo.cpp | 108 int PPCTTIImpl::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, in getIntImmCost()
281 unsigned Opcode, Type *Ty, TTI::OperandValueKind Op1Info, in getArithmeticInstrCost()
304 int PPCTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) { in getCastInstrCost()
310 int PPCTTIImpl::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy) { in getCmpSelInstrCost()
314 int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) { in getVectorInstrCost()
353 int PPCTTIImpl::getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment, in getMemoryOpCost()
410 int PPCTTIImpl::getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, in getInterleavedMemoryOpCost()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCPredicates.cpp | 18 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
52 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCPredicates.cpp | 19 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
53 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
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| /external/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCPredicates.cpp | 18 PPC::Predicate PPC::InvertPredicate(PPC::Predicate Opcode) { in InvertPredicate()
52 PPC::Predicate PPC::getSwappedPredicate(PPC::Predicate Opcode) { in getSwappedPredicate()
|