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Searched defs:Order (Results 1 – 25 of 215) sorted by relevance

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/external/llvm-project/llvm/unittests/CodeGen/
DAllocationOrderTest.cpp29 SmallVector<MCPhysReg, 16> Order = {4, 5, 6, 7}; in TEST() local
36 SmallVector<MCPhysReg, 16> Order = {4, 1, 5, 6}; in TEST() local
43 SmallVector<MCPhysReg, 16> Order = {4, 5, 6, 7}; in TEST() local
50 SmallVector<MCPhysReg, 16> Order = {4, 5, 6, 7}; in TEST() local
59 SmallVector<MCPhysReg, 16> Order = {4, 1, 5, 6}; in TEST() local
69 SmallVector<MCPhysReg, 16> Order = {4, 1, 5, 6}; in TEST() local
76 SmallVector<MCPhysReg, 16> Order = {1, 4, 5, 6}; in TEST() local
83 SmallVector<MCPhysReg, 16> Order = {1, 4, 5, 6}; in TEST() local
92 SmallVector<MCPhysReg, 16> Order = {1, 2, 3, 4}; in TEST() local
101 SmallVector<MCPhysReg, 16> Order = {4, 1, 5, 6}; in TEST() local
/external/icu/icu4c/source/test/intltest/
Dtscoll.h28 struct Order struct
53 Order *getOrders(CollationElementIterator &iter, int32_t &orderLength); argument
/external/libopus/silk/float/
DcorrMatrix_FLP.c43const opus_int Order, /* I Max lag for correlatio… in silk_corrVector_FLP()
62const opus_int Order, /* I Max lag for correlatio… in silk_corrMatrix_FLP()
/external/llvm-project/llvm/lib/CodeGen/
DAllocationOrder.h32 ArrayRef<MCPhysReg> Order; variable
90 AllocationOrder(SmallVector<MCPhysReg, 16> &&Hints, ArrayRef<MCPhysReg> Order, in AllocationOrder()
DRegAllocGreedy.cpp763 AllocationOrder &Order, in tryAssign()
817 auto Order = in canReassign() local
1029 MCRegister RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order, in getCheapestEvicteeWeight()
1113 AllocationOrder &Order, in tryEvict()
1491 const AllocationOrder &Order) { in splitCanCauseEvictionChain()
1550 const AllocationOrder &Order) { in splitCanCauseLocalSpill()
1587 const AllocationOrder &Order, in calcGlobalSplitCost()
1819 AllocationOrder &Order, in tryRegionSplit()
1863 AllocationOrder &Order, in calculateRegionSplitCost()
2009 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryBlockSplit()
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DAllocationOrder.cpp34 auto Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); in create() local
/external/googletest/docs/
Dgmock_cheat_sheet.md362 ### The After Clause {#AfterClause}
396 ### Sequences {#UsingSequences}
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DSDNodeDbgValue.h51 unsigned Order; variable
77 bool IsIndirect, DebugLoc DL, unsigned Order, in SDDbgValue()
147 unsigned Order; variable
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DSDNodeDbgValue.h51 unsigned Order; variable
77 bool IsIndirect, DebugLoc DL, unsigned Order, in SDDbgValue()
147 unsigned Order; variable
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DRegAllocGreedy.cpp763 AllocationOrder &Order, in tryAssign()
810 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in canReassign() local
1022 unsigned RAGreedy::getCheapestEvicteeWeight(const AllocationOrder &Order, in getCheapestEvicteeWeight()
1107 AllocationOrder &Order, in tryEvict()
1486 const AllocationOrder &Order) { in splitCanCauseEvictionChain()
1546 const AllocationOrder &Order) { in splitCanCauseLocalSpill()
1584 const AllocationOrder &Order, in calcGlobalSplitCost()
1829 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryRegionSplit()
1873 AllocationOrder &Order, in calculateRegionSplitCost()
2019 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryBlockSplit()
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DAllocationOrder.h31 ArrayRef<MCPhysReg> Order; variable
/external/swiftshader/third_party/subzero/src/
DIceIntrinsics.cpp32 bool Intrinsics::isMemoryOrderValid(IntrinsicID ID, uint64_t Order, in isMemoryOrderValid()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DDynamicLibrary.cpp76 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup()
91 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup()
/external/llvm-project/llvm/lib/Support/
DDynamicLibrary.cpp76 void *LibLookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in LibLookup()
91 void *Lookup(const char *Symbol, DynamicLibrary::SearchOrdering Order) { in Lookup()
/external/lzma/CPP/7zip/Compress/
DPpmdEncoder.h21 int Order; member
/external/llvm/lib/CodeGen/
DAllocationOrder.h31 ArrayRef<MCPhysReg> Order; variable
DRegAllocGreedy.cpp619 AllocationOrder &Order, in tryAssign()
663 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo, Matrix); in canReassign() local
859 AllocationOrder &Order, in tryEvict()
1353 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryRegionSplit()
1384 AllocationOrder &Order, in calculateRegionSplitCost()
1513 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryBlockSplit()
1581 RAGreedy::tryInstructionSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryInstructionSplit()
1725 unsigned RAGreedy::tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order, in tryLocalSplit()
1952 unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order, in trySplit()
2080 AllocationOrder &Order, in tryLastChanceRecoloring()
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/external/python/cpython2/Doc/library/
Dstruct.rst153 .. _format-characters:
/external/perfetto/src/trace_processor/dynamic/
Dexperimental_sched_upid_generator.cc51 const std::vector<Order>&) { in ComputeTable()
/external/python/cpython3/Doc/library/
Dstruct.rst181 .. _format-characters:
/external/icing/proto/icing/proto/
Dscoring.proto76 message Order { message
/external/eigen/unsupported/Eigen/src/Splines/
DSpline.h299 enum { Order = SplineTraits<Spline>::OrderAtCompileTime }; in operator() enumerator
316 enum { Order = SplineTraits<SplineType>::OrderAtCompileTime }; in derivativesImpl() enumerator
381 enum { Order = SplineTraits<SplineType>::OrderAtCompileTime }; in BasisFunctionDerivativesImpl() enumerator
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86ISelLowering.h1543 X86StoreSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, in X86StoreSDNode()
1561 X86MaskedStoreSDNode(unsigned Opcode, unsigned Order, in X86MaskedStoreSDNode()
1579 TruncSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncSStoreSDNode()
1591 TruncUSStoreSDNode(unsigned Order, const DebugLoc &dl, in TruncUSStoreSDNode()
1603 MaskedTruncSStoreSDNode(unsigned Order, in MaskedTruncSStoreSDNode()
1616 MaskedTruncUSStoreSDNode(unsigned Order, in MaskedTruncUSStoreSDNode()
1631 X86MaskedGatherScatterSDNode(unsigned Opc, unsigned Order, in X86MaskedGatherScatterSDNode()
1649 X86MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedGatherSDNode()
1663 X86MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, in X86MaskedScatterSDNode()
/external/cblas/src/
Dcblas_zsyrk.c12 void cblas_zsyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_zsyrk()
Dcblas_ssyrk.c12 void cblas_ssyrk(const enum CBLAS_ORDER Order, const enum CBLAS_UPLO Uplo, in cblas_ssyrk()

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