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1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevc_defs.h
22 *
23 * @brief
24 *  Definitions used in the codec
25 *
26 * @author
27 *  Ittiam
28 *
29 *
30 * @remarks
31 *  None
32 *
33 *******************************************************************************
34 */
35 #ifndef _IHEVC_DEFS_H_
36 #define _IHEVC_DEFS_H_
37 
38 /*****************************************************************************/
39 /* Profile and Levels                                                        */
40 /*****************************************************************************/
41 enum
42 {
43     IHEVC_PROFILE_MAIN = 0,
44 };
45 
46 enum
47 {
48     IHEVC_TIER_MAIN,
49     IHEVC_TIER_HIGH,
50 };
51 
52 
53 /* Slice type enums - Do not change the values */
54 
55 enum
56 {
57     BSLICE = 0,
58     PSLICE = 1,
59     ISLICE = 2,
60 };
61 
62 /** Enum for Level : Multiplication by 30 as per spec is implemented as multiplied by 10 and then by 3
63  * User will give level multiplied by 10 in the API
64  */
65 enum
66 {
67     IHEVC_LEVEL_10 = 10 * 3,
68     IHEVC_LEVEL_20 = 20 * 3,
69     IHEVC_LEVEL_21 = 21 * 3,
70     IHEVC_LEVEL_30 = 30 * 3,
71     IHEVC_LEVEL_31 = 31 * 3,
72     IHEVC_LEVEL_40 = 40 * 3,
73     IHEVC_LEVEL_41 = 41 * 3,
74     IHEVC_LEVEL_50 = 50 * 3,
75     IHEVC_LEVEL_51 = 51 * 3,
76     IHEVC_LEVEL_52 = 52 * 3,
77     IHEVC_LEVEL_60 = 60 * 3,
78     IHEVC_LEVEL_61 = 61 * 3,
79     IHEVC_LEVEL_62 = 62 * 3,
80 };
81 
82 
83 enum
84 {
85     NAL_TRAIL_N     = 0,
86     NAL_TRAIL_R,
87     NAL_TSA_N,
88     NAL_TSA_R,
89     NAL_STSA_N,
90     NAL_STSA_R,
91     NAL_RADL_N,
92     NAL_RADL_R,
93     NAL_RASL_N,
94     NAL_RASL_R,
95     NAL_RSV_VCL_N10 = 10,
96     NAL_RSV_VCL_N12 = 12,
97     NAL_RSV_VCL_N14 = 14,
98     NAL_RSV_VCL_R11 = 11,
99     NAL_RSV_VCL_R13 = 13,
100     NAL_RSV_VCL_R15 = 15,
101 
102     NAL_BLA_W_LP    = 16,
103     NAL_BLA_W_DLP,
104     NAL_BLA_N_LP,
105     NAL_IDR_W_LP,
106     NAL_IDR_N_LP,
107     NAL_CRA,
108     NAL_RSV_RAP_VCL22 = 22,
109     NAL_RSV_RAP_VCL23 = 23,
110     NAL_RSV_VCL24 = 24,
111     NAL_RSV_VCL31 = 31,
112     NAL_VPS       = 32,
113     NAL_SPS,
114     NAL_PPS,
115     NAL_AUD,
116     NAL_EOS,
117     NAL_EOB,
118     NAL_FD,
119     NAL_PREFIX_SEI = 39,
120     NAL_SUFFIX_SEI = 40,
121     NAL_RSV_NVCL41 = 41,
122     NAL_RSV_NVCL47 = 47 ,
123     NAL_UNSPEC48   = 48 ,
124     NAL_UNSPEC63   = 49,
125 };
126 
127 enum
128 {
129     CHROMA_FMT_IDC_MONOCHROME   = 0,
130     CHROMA_FMT_IDC_YUV420       = 1,
131     CHROMA_FMT_IDC_YUV422       = 2,
132     CHROMA_FMT_IDC_YUV444       = 3,
133     CHROMA_FMT_IDC_YUV444_PLANES = 4,
134 };
135 
136 typedef enum
137 {
138     NULL_PLANE = -1,
139     U_PLANE = 0,
140     V_PLANE = 1
141 } CHROMA_PLANE_ID_T;
142 
143 /* Pred Modes */
144 /* Do not change enum values */
145 enum
146 {
147     PRED_MODE_INTER = 0,
148     PRED_MODE_INTRA = 1,
149     PRED_MODE_SKIP  = 2
150 };
151 
152 /* Partition Modes */
153 /* Do not change enum values */
154 enum
155 {
156     PART_2Nx2N  = 0,
157     PART_2NxN   = 1,
158     PART_Nx2N   = 2,
159     PART_NxN    = 3,
160     PART_2NxnU  = 4,
161     PART_2NxnD  = 5,
162     PART_nLx2N  = 6,
163     PART_nRx2N  = 7
164 };
165 
166 /* Prediction list */
167 /* Do not change enum values */
168 enum
169 {
170     PRED_L0 = 0,
171     PRED_L1 = 1,
172     PRED_BI = 2
173 };
174 
175 /**
176  * Scan types
177  */
178 enum
179 {
180     SCAN_DIAG_UPRIGHT,
181     SCAN_HORZ,
182     SCAN_VERT
183 };
184 
185 /**
186  * VUI aspect ratio indicator
187  */
188 enum
189 {
190     SAR_UNUSED = 0,
191     SAR_1_1 = 1,
192     SAR_12_11,
193     SAR_10_11,
194     SAR_16_11,
195     SAR_40_33,
196     SAR_24_11,
197     SAR_20_11,
198     SAR_32_11,
199     SAR_80_33,
200     SAR_18_11,
201     SAR_15_11,
202     SAR_64_33,
203     SAR_160_99,
204     SAR_4_3,
205     SAR_3_2,
206     SAR_2_1,
207     EXTENDED_SAR = 255
208 };
209 
210 enum
211 {
212     VID_FMT_COMPONENT = 0,
213     VID_FMT_PAL,
214     VID_FMT_NTSC,
215     VID_FMT_SECAM,
216     VID_FMT_MAC,
217     VID_FMT_UNSPECIFIED
218 };
219 
220 typedef enum {
221     USER_DATA_BAR_DATA       = 0,
222     USER_DATA_CC_DATA        = 1,
223     USER_DATA_AFD_DATA       = 2,
224 
225     // do not add anything below
226     USER_DATA_MAX
227 } USER_DATA_SEI_TYPE_T;
228 
229 /**
230  ****************************************************************************
231  * SEI payload type
232  ****************************************************************************
233  */
234 enum
235 {
236     SEI_BUFFERING_PERIOD                     = 0,
237     SEI_PICTURE_TIMING                       = 1,
238     SEI_PAN_SCAN_RECT                        = 2,
239     SEI_FILLER_PAYLOAD                       = 3,
240     SEI_USER_DATA_REGISTERED_ITU_T_T35       = 4,
241     SEI_USER_DATA_UNREGISTERED               = 5,
242     SEI_RECOVERY_POINT                       = 6,
243     SEI_SCENE_INFO                           = 9,
244     SEI_FULL_FRAME_SNAPSHOT                  = 15,
245     SEI_PROGRESSIVE_REFINEMENT_SEGMENT_START = 16,
246     SEI_PROGRESSIVE_REFINEMENT_SEGMENT_END   = 17,
247     SEI_FILM_GRAIN_CHARACTERISTICS           = 19,
248     SEI_POST_FILTER_HINT                     = 22,
249     SEI_TONE_MAPPING_INFO                    = 23,
250     SEI_FRAME_PACKING                        = 45,
251     SEI_DISPLAY_ORIENTATION                  = 47,
252     SEI_SOP_DESCRIPTION                      = 128,
253     SEI_ACTIVE_PARAMETER_SETS                = 129,
254     SEI_DECODING_UNIT_INFO                   = 130,
255     SEI_TEMPORAL_LEVEL0_INDEX                = 131,
256     SEI_DECODED_PICTURE_HASH                 = 132,
257     SEI_SCALABLE_NESTING                     = 133,
258     SEI_REGION_REFRESH_INFO                  = 134,
259     SEI_NO_DISPLAY                           = 135,
260     SEI_TIME_CODE                            = 136,
261     SEI_MASTERING_DISPLAY_COLOUR_VOLUME      = 137,
262     SEI_SEGM_RECT_FRAME_PACKING              = 138,
263     SEI_TEMP_MOTION_CONSTRAINED_TILE_SETS    = 139,
264     SEI_CHROMA_SAMPLING_FILTER_HINT          = 140,
265     SEI_KNEE_FUNCTION_INFO                   = 141
266 };
267 
268 
269 #define BIT_DEPTH           8
270 #define BIT_DEPTH_LUMA      BIT_DEPTH
271 #define BIT_DEPTH_CHROMA    BIT_DEPTH
272 /*****************************************************************************/
273 /* Profile tier level defs                                                   */
274 /*****************************************************************************/
275 #define MAX_PROFILE_COMPATBLTY 32
276 
277 /*****************************************************************************/
278 /* Reference frame defs                                                      */
279 /*****************************************************************************/
280 /* Maximum DPB size */
281 #define MAX_DPB_SIZE 16
282 
283 
284 /*****************************************************************************/
285 /* VPS restrictions                                                          */
286 /*****************************************************************************/
287 
288 /* Number of VPS allowed  in Main Profile */
289 #define MAX_VPS_CNT         16
290 
291 /* Max sub layers in VPS */
292 #define VPS_MAX_SUB_LAYERS  7
293 
294 /* Max number of HRD parameters */
295 #define VPS_MAX_HRD_PARAMS  2
296 
297 /* Maximum number of operation point layers */
298 #define VPS_MAX_OP_LAYERS 2
299 
300 
301 /*****************************************************************************/
302 /* Tile restrictions                                                         */
303 /*****************************************************************************/
304 /* Minimum tile width in Main Profile */
305 #define MIN_TILE_WD  MAX_CTB_SIZE
306 
307 /* Minimum tile height in Main Profile */
308 #define MIN_TILE_HT  MAX_CTB_SIZE
309 
310 /*****************************************************************************/
311 /* SPS restrictions                                                          */
312 /*****************************************************************************/
313 
314 /* Number of SPS allowed in Main Profile*/
315 /* An extra buffer is allocated to write the parsed data
316  * It is copied to the appropriate location later */
317 #define MAX_SPS_CNT         (16 + 1)
318 
319 /* Max sub layers in PPS */
320 #define SPS_MAX_SUB_LAYERS  7
321 
322 /* Maximum long term reference pics */
323 #define MAX_LTREF_PICS_SPS 32
324 
325 #define MAX_STREF_PICS_SPS 64
326 
327 /*****************************************************************************/
328 /* PPS restrictions                                                          */
329 /*****************************************************************************/
330 
331 /* Number of PPS allowed in Main Profile */
332 /* An extra buffer is allocated to write the parsed data
333  * It is copied to the appropriate location later */
334 #define MAX_PPS_CNT         (64 + 1)
335 
336 /*****************************************************************************/
337 /* Macro definitions for sizes of CTB, PU, TU, CU                            */
338 /*****************************************************************************/
339 
340 /* CTB Size Range */
341 #define MAX_CTB_SIZE        64
342 #define MIN_CTB_SIZE        16
343 #define LOG2_MAX_CTB_SIZE   6
344 #define LOG2_MIN_CTB_SIZE   4
345 
346 /* TU Size Range */
347 #define MAX_TU_SIZE         32
348 #define MIN_TU_SIZE         4
349 #define LOG2_MAX_TU_SIZE    5
350 #define LOG2_MIN_TU_SIZE    2
351 
352 /* Max Transform Size */
353 #define MAX_TRANS_SIZE      (MAX_TU_SIZE*MAX_TU_SIZE)
354 
355 /* PU Size Range */
356 #define MAX_PU_SIZE         64
357 #define MIN_PU_SIZE         4
358 #define LOG2_MAX_PU_SIZE    6
359 #define LOG2_MIN_PU_SIZE    2
360 
361 /* CU Size Range */
362 #define MAX_CU_SIZE         64
363 #define MIN_CU_SIZE         8
364 #define LOG2_MAX_CU_SIZE    6
365 #define LOG2_MIN_CU_SIZE    3
366 
367 /* Number of max TU in a CTB row */
368 #define MAX_TU_IN_CTB_ROW   ((MAX_CTB_SIZE / MIN_TU_SIZE))
369 
370 /* Number of max TU in a CTB row */
371 #define MAX_CU_IN_CTB_ROW   ((MAX_CTB_SIZE / MIN_CU_SIZE))
372 
373 /* Number of max PU in a CTb row */
374 #define MAX_PU_IN_CTB_ROW   ((MAX_CTB_SIZE / MIN_PU_SIZE))
375 
376 /* Number of max CU in a CTB */
377 #define MAX_CU_IN_CTB       ((MAX_CTB_SIZE / MIN_CU_SIZE) * \
378                              (MAX_CTB_SIZE / MIN_CU_SIZE))
379 
380 /* Number of max PU in a CTB */
381 /*****************************************************************************/
382 /* Note though for 64 x 64 CTB, Max PU in CTB is 128, in order to store      */
383 /*  intra pred info, 256 entries are needed                                  */
384 /*****************************************************************************/
385 #define MAX_PU_IN_CTB       ((MAX_CTB_SIZE / MIN_PU_SIZE) * \
386                              (MAX_CTB_SIZE / MIN_PU_SIZE))
387 
388 /* Number of max TU in a CTB */
389 #define MAX_TU_IN_CTB       ((MAX_CTB_SIZE / MIN_TU_SIZE) * \
390                              (MAX_CTB_SIZE / MIN_TU_SIZE))
391 
392 
393 
394 /**
395  * Maximum transform depths
396  */
397 #define MAX_TRAFO_DEPTH 5
398 
399 
400 
401 
402 /* Max number of deblocking edges */
403 #define MAX_VERT_DEBLK_EDGES ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/4))
404 #define MAX_HORZ_DEBLK_EDGES ((MAX_CTB_SIZE/4) * (MAX_CTB_SIZE/8))
405 
406 /* Qp can not change below 8x8 level */
407 #define MAX_DEBLK_QP_CNT     ((MAX_CTB_SIZE/8) * (MAX_CTB_SIZE/8))
408 
409 /*****************************************************************************/
410 /* Parsing related macros                                                    */
411 /*****************************************************************************/
412 #define SUBBLK_COEFF_CNT    16
413 
414 /* Quant and Trans defs */
415 
416 /*****************************************************************************/
417 /* Sizes for Transform functions                                             */
418 /*****************************************************************************/
419 #define TRANS_SIZE_4   4
420 #define TRANS_SIZE_8   8
421 #define TRANS_SIZE_16 16
422 #define TRANS_SIZE_32 32
423 
424 
425 #define IT_SHIFT_STAGE_1 7
426 #define IT_SHIFT_STAGE_2 12
427 
428 /**
429  * @brief  Maximum transform dynamic range (excluding sign bit)
430  */
431 #define MAX_TR_DYNAMIC_RANGE  15
432 
433 /**
434  * @brief  Q(QP%6) * IQ(QP%6) = 2^20
435  */
436 #define QUANT_IQUANT_SHIFT    20
437 
438 /**
439  * @brief Q factor for Qp%6 multiplication
440  */
441 #define QUANT_SHIFT           14
442 
443 /**
444  * @brief Q shift factor for flat rescale matrix weights
445  */
446 #define FLAT_RESCALE_MAT_Q_SHIFT    11
447 
448 /**
449  * @brief  Scaling matrix is represented in Q15 format
450  */
451 #define SCALING_Q_SHIFT       15
452 
453 /**
454  * @brief  rounding factor for quantization represented in Q9 format
455  */
456 #define QUANT_ROUND_FACTOR_Q   9
457 
458 /**
459  * @brief  Minimum qp supported in HEVC spec
460  */
461 #define MIN_HEVC_QP 0
462 
463 /**
464  * @brief  Maximum qp supported in HEVC spec
465  */
466 #define MAX_HEVC_QP 51  //FOR MAIN Branch Encoder
467 
468 #define MAX_HEVC_QP_10bit 63  //FOR HBD Branch Encoder
469 
470 #define MAX_HEVC_QP_12bit 75  //FOR HBD Branch Encoder
471 
472 
473 /**
474  * @brief  Total number of transform sizes
475  * used for sizeID while getting scale matrix
476  */
477 #define NUM_UNIQUE_TRANS_SIZE 4
478 
479 /*****************************************************************************/
480 /* Number of scaling matrices for each transform size                        */
481 /*****************************************************************************/
482 #define SCALE_MAT_CNT_TRANS_SIZE_4    6
483 #define SCALE_MAT_CNT_TRANS_SIZE_8    6
484 #define SCALE_MAT_CNT_TRANS_SIZE_16   6
485 #define SCALE_MAT_CNT_TRANS_SIZE_32   2
486 
487 /* Maximum number of scale matrices for a given transform size */
488 #define SCALE_MAT_CNT_MAX_PER_TRANS_SIZE 6
489 
490 /* Total number of scale matrices */
491 #define TOTAL_SCALE_MAT_COUNT   (SCALE_MAT_CNT_TRANS_SIZE_4     + \
492                                  SCALE_MAT_CNT_TRANS_SIZE_8     + \
493                                  SCALE_MAT_CNT_TRANS_SIZE_16    + \
494                                  SCALE_MAT_CNT_TRANS_SIZE_32)
495 
496 
497 /*****************************************************************************/
498 /* Intra pred Macros                                                         */
499 /*****************************************************************************/
500 /** Planar Intra prediction mode */
501 #define INTRA_PLANAR             0
502 
503 /** DC Intra prediction mode */
504 #define INTRA_DC                 1
505 
506 /** Gives angular mode for intra prediction */
507 #define INTRA_ANGULAR(x) (x)
508 
509 /** Following is used to signal no intra prediction in case of pcm blocks
510  */
511 #define INTRA_PRED_NONE  63
512 
513 
514 /** Following is used to signal no intra prediction is needed for first three
515  * 4x4 luma blocks in case of 4x4 TU sizes
516  * Also used in pcm cases
517  */
518 #define INTRA_PRED_CHROMA_IDX_NONE  7
519 
520 #define MAX_NUM_CLOCK_TS    3
521 #define MAX_USERDATA_PAYLOAD 256
522 
523 #define MAX_CPB_CNT 32
524 
525 #endif /*__IHEVC_DEFS_H_*/
526