Home
last modified time | relevance | path

Searched defs:PIPE_CONTROL_CACHE_INVALIDATE_BITS (Results 1 – 2 of 2) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_pipe_control.h72 #define PIPE_CONTROL_CACHE_INVALIDATE_BITS \ macro
/external/mesa3d/src/gallium/drivers/iris/
Diris_context.h329 #define PIPE_CONTROL_CACHE_INVALIDATE_BITS \ macro