1 // Copyright 2017 Google LLC 2 // 3 // Licensed under the Apache License, Version 2.0 (the "License"); 4 // you may not use this file except in compliance with the License. 5 // You may obtain a copy of the License at 6 // 7 // http://www.apache.org/licenses/LICENSE-2.0 8 // 9 // Unless required by applicable law or agreed to in writing, software 10 // distributed under the License is distributed on an "AS IS" BASIS, 11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 // See the License for the specific language governing permissions and 13 // limitations under the License. 14 15 // Interface to retrieve hardware capabilities. It relies on Linux's getauxval 16 // or `/proc/self/auxval` under the hood. 17 #ifndef CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 18 #define CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 19 20 #include <stdbool.h> 21 #include <stdint.h> 22 23 #include "cpu_features_macros.h" 24 25 CPU_FEATURES_START_CPP_NAMESPACE 26 27 // To avoid depending on the linux kernel we reproduce the architecture specific 28 // constants here. 29 30 // http://elixir.free-electrons.com/linux/latest/source/arch/arm64/include/uapi/asm/hwcap.h 31 #define AARCH64_HWCAP_FP (1UL << 0) 32 #define AARCH64_HWCAP_ASIMD (1UL << 1) 33 #define AARCH64_HWCAP_EVTSTRM (1UL << 2) 34 #define AARCH64_HWCAP_AES (1UL << 3) 35 #define AARCH64_HWCAP_PMULL (1UL << 4) 36 #define AARCH64_HWCAP_SHA1 (1UL << 5) 37 #define AARCH64_HWCAP_SHA2 (1UL << 6) 38 #define AARCH64_HWCAP_CRC32 (1UL << 7) 39 #define AARCH64_HWCAP_ATOMICS (1UL << 8) 40 #define AARCH64_HWCAP_FPHP (1UL << 9) 41 #define AARCH64_HWCAP_ASIMDHP (1UL << 10) 42 #define AARCH64_HWCAP_CPUID (1UL << 11) 43 #define AARCH64_HWCAP_ASIMDRDM (1UL << 12) 44 #define AARCH64_HWCAP_JSCVT (1UL << 13) 45 #define AARCH64_HWCAP_FCMA (1UL << 14) 46 #define AARCH64_HWCAP_LRCPC (1UL << 15) 47 #define AARCH64_HWCAP_DCPOP (1UL << 16) 48 #define AARCH64_HWCAP_SHA3 (1UL << 17) 49 #define AARCH64_HWCAP_SM3 (1UL << 18) 50 #define AARCH64_HWCAP_SM4 (1UL << 19) 51 #define AARCH64_HWCAP_ASIMDDP (1UL << 20) 52 #define AARCH64_HWCAP_SHA512 (1UL << 21) 53 #define AARCH64_HWCAP_SVE (1UL << 22) 54 #define AARCH64_HWCAP_ASIMDFHM (1UL << 23) 55 #define AARCH64_HWCAP_DIT (1UL << 24) 56 #define AARCH64_HWCAP_USCAT (1UL << 25) 57 #define AARCH64_HWCAP_ILRCPC (1UL << 26) 58 #define AARCH64_HWCAP_FLAGM (1UL << 27) 59 #define AARCH64_HWCAP_SSBS (1UL << 28) 60 #define AARCH64_HWCAP_SB (1UL << 29) 61 #define AARCH64_HWCAP_PACA (1UL << 30) 62 #define AARCH64_HWCAP_PACG (1UL << 31) 63 64 #define AARCH64_HWCAP2_DCPODP (1UL << 0) 65 #define AARCH64_HWCAP2_SVE2 (1UL << 1) 66 #define AARCH64_HWCAP2_SVEAES (1UL << 2) 67 #define AARCH64_HWCAP2_SVEPMULL (1UL << 3) 68 #define AARCH64_HWCAP2_SVEBITPERM (1UL << 4) 69 #define AARCH64_HWCAP2_SVESHA3 (1UL << 5) 70 #define AARCH64_HWCAP2_SVESM4 (1UL << 6) 71 #define AARCH64_HWCAP2_FLAGM2 (1UL << 7) 72 #define AARCH64_HWCAP2_FRINT (1UL << 8) 73 #define AARCH64_HWCAP2_SVEI8MM (1UL << 9) 74 #define AARCH64_HWCAP2_SVEF32MM (1UL << 10) 75 #define AARCH64_HWCAP2_SVEF64MM (1UL << 11) 76 #define AARCH64_HWCAP2_SVEBF16 (1UL << 12) 77 #define AARCH64_HWCAP2_I8MM (1UL << 13) 78 #define AARCH64_HWCAP2_BF16 (1UL << 14) 79 #define AARCH64_HWCAP2_DGH (1UL << 15) 80 #define AARCH64_HWCAP2_RNG (1UL << 16) 81 #define AARCH64_HWCAP2_BTI (1UL << 17) 82 83 // http://elixir.free-electrons.com/linux/latest/source/arch/arm/include/uapi/asm/hwcap.h 84 #define ARM_HWCAP_SWP (1UL << 0) 85 #define ARM_HWCAP_HALF (1UL << 1) 86 #define ARM_HWCAP_THUMB (1UL << 2) 87 #define ARM_HWCAP_26BIT (1UL << 3) 88 #define ARM_HWCAP_FAST_MULT (1UL << 4) 89 #define ARM_HWCAP_FPA (1UL << 5) 90 #define ARM_HWCAP_VFP (1UL << 6) 91 #define ARM_HWCAP_EDSP (1UL << 7) 92 #define ARM_HWCAP_JAVA (1UL << 8) 93 #define ARM_HWCAP_IWMMXT (1UL << 9) 94 #define ARM_HWCAP_CRUNCH (1UL << 10) 95 #define ARM_HWCAP_THUMBEE (1UL << 11) 96 #define ARM_HWCAP_NEON (1UL << 12) 97 #define ARM_HWCAP_VFPV3 (1UL << 13) 98 #define ARM_HWCAP_VFPV3D16 (1UL << 14) 99 #define ARM_HWCAP_TLS (1UL << 15) 100 #define ARM_HWCAP_VFPV4 (1UL << 16) 101 #define ARM_HWCAP_IDIVA (1UL << 17) 102 #define ARM_HWCAP_IDIVT (1UL << 18) 103 #define ARM_HWCAP_VFPD32 (1UL << 19) 104 #define ARM_HWCAP_LPAE (1UL << 20) 105 #define ARM_HWCAP_EVTSTRM (1UL << 21) 106 #define ARM_HWCAP2_AES (1UL << 0) 107 #define ARM_HWCAP2_PMULL (1UL << 1) 108 #define ARM_HWCAP2_SHA1 (1UL << 2) 109 #define ARM_HWCAP2_SHA2 (1UL << 3) 110 #define ARM_HWCAP2_CRC32 (1UL << 4) 111 112 // http://elixir.free-electrons.com/linux/latest/source/arch/mips/include/uapi/asm/hwcap.h 113 #define MIPS_HWCAP_R6 (1UL << 0) 114 #define MIPS_HWCAP_MSA (1UL << 1) 115 #define MIPS_HWCAP_CRC32 (1UL << 2) 116 117 // http://elixir.free-electrons.com/linux/latest/source/arch/powerpc/include/uapi/asm/cputable.h 118 #ifndef _UAPI__ASM_POWERPC_CPUTABLE_H 119 /* in AT_HWCAP */ 120 #define PPC_FEATURE_32 0x80000000 121 #define PPC_FEATURE_64 0x40000000 122 #define PPC_FEATURE_601_INSTR 0x20000000 123 #define PPC_FEATURE_HAS_ALTIVEC 0x10000000 124 #define PPC_FEATURE_HAS_FPU 0x08000000 125 #define PPC_FEATURE_HAS_MMU 0x04000000 126 #define PPC_FEATURE_HAS_4xxMAC 0x02000000 127 #define PPC_FEATURE_UNIFIED_CACHE 0x01000000 128 #define PPC_FEATURE_HAS_SPE 0x00800000 129 #define PPC_FEATURE_HAS_EFP_SINGLE 0x00400000 130 #define PPC_FEATURE_HAS_EFP_DOUBLE 0x00200000 131 #define PPC_FEATURE_NO_TB 0x00100000 132 #define PPC_FEATURE_POWER4 0x00080000 133 #define PPC_FEATURE_POWER5 0x00040000 134 #define PPC_FEATURE_POWER5_PLUS 0x00020000 135 #define PPC_FEATURE_CELL 0x00010000 136 #define PPC_FEATURE_BOOKE 0x00008000 137 #define PPC_FEATURE_SMT 0x00004000 138 #define PPC_FEATURE_ICACHE_SNOOP 0x00002000 139 #define PPC_FEATURE_ARCH_2_05 0x00001000 140 #define PPC_FEATURE_PA6T 0x00000800 141 #define PPC_FEATURE_HAS_DFP 0x00000400 142 #define PPC_FEATURE_POWER6_EXT 0x00000200 143 #define PPC_FEATURE_ARCH_2_06 0x00000100 144 #define PPC_FEATURE_HAS_VSX 0x00000080 145 146 #define PPC_FEATURE_PSERIES_PERFMON_COMPAT 0x00000040 147 148 /* Reserved - do not use 0x00000004 */ 149 #define PPC_FEATURE_TRUE_LE 0x00000002 150 #define PPC_FEATURE_PPC_LE 0x00000001 151 152 /* in AT_HWCAP2 */ 153 #define PPC_FEATURE2_ARCH_2_07 0x80000000 154 #define PPC_FEATURE2_HTM 0x40000000 155 #define PPC_FEATURE2_DSCR 0x20000000 156 #define PPC_FEATURE2_EBB 0x10000000 157 #define PPC_FEATURE2_ISEL 0x08000000 158 #define PPC_FEATURE2_TAR 0x04000000 159 #define PPC_FEATURE2_VEC_CRYPTO 0x02000000 160 #define PPC_FEATURE2_HTM_NOSC 0x01000000 161 #define PPC_FEATURE2_ARCH_3_00 0x00800000 162 #define PPC_FEATURE2_HAS_IEEE128 0x00400000 163 #define PPC_FEATURE2_DARN 0x00200000 164 #define PPC_FEATURE2_SCV 0x00100000 165 #define PPC_FEATURE2_HTM_NO_SUSPEND 0x00080000 166 #endif 167 168 typedef struct { 169 unsigned long hwcaps; 170 unsigned long hwcaps2; 171 } HardwareCapabilities; 172 173 HardwareCapabilities CpuFeatures_GetHardwareCapabilities(void); 174 bool CpuFeatures_IsHwCapsSet(const HardwareCapabilities hwcaps_mask, 175 const HardwareCapabilities hwcaps); 176 177 typedef struct { 178 char platform[64]; // 0 terminated string 179 char base_platform[64]; // 0 terminated string 180 } PlatformType; 181 182 PlatformType CpuFeatures_GetPlatformType(void); 183 184 CPU_FEATURES_END_CPP_NAMESPACE 185 186 #endif // CPU_FEATURES_INCLUDE_INTERNAL_HWCAPS_H_ 187