| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 524 Register PtrReg = B.getMRI()->createGenericVirtualRegister(PtrTy); in lowerParameter() local
641 Register PtrReg = MRI.createGenericVirtualRegister(ConstPtrTy); in lowerFormalArgumentsKernel() local
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| D | AMDGPUInstructionSelector.cpp | 2353 Register PtrReg = MI.getOperand(1).getReg(); in selectG_AMDGPU_ATOMIC_CMPXCHG() local
3358 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm() local
3374 Register PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm32() local
3408 Register PtrReg = GEPInfo.SgprParts[0]; in selectSmrdSgpr() local
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| D | AMDGPURegisterBankInfo.cpp | 1170 Register PtrReg = MI.getOperand(1).getReg(); in applyMappingLoad() local
3328 Register PtrReg = MI.getOperand(1).getReg(); in getInstrMappingForLoad() local
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| D | AMDGPULegalizerInfo.cpp | 2370 Register PtrReg = MI.getOperand(1).getReg(); in legalizeLoad() local
2469 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 1984 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm() local
2001 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdImm32() local
2033 unsigned PtrReg = GEPInfo.SgprParts[0]; in selectSmrdSgpr() local
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| D | AMDGPUCallLowering.cpp | 373 Register PtrReg = lowerParameterPtr(B, ParamTy, Offset); in lowerParameter() local
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| D | AMDGPULegalizerInfo.cpp | 1782 Register PtrReg = MI.getOperand(1).getReg(); in legalizeAtomicCmpXChg() local
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| D | AMDGPURegisterBankInfo.cpp | 2356 Register PtrReg = MI.getOperand(1).getReg(); in getInstrMappingForLoad() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 815 Register PtrReg = MI.getOperand(1).getReg(); in narrowScalar() local
2075 Register PtrReg = MI.getOperand(1).getReg(); in lower() local
2167 Register PtrReg = MI.getOperand(1).getReg(); in lower() local
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 2152 MachineInstr &MI, std::pair<Register, bool> &PtrReg) { in matchCombineAddP2IToPtrAdd()
2177 MachineInstr &MI, std::pair<Register, bool> &PtrReg) { in applyCombineAddP2IToPtrAdd()
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| D | LegalizerHelper.cpp | 961 Register PtrReg = MI.getOperand(1).getReg(); in narrowScalar() local
2649 Register PtrReg = MI.getOperand(1).getReg(); in lowerLoad() local
2745 Register PtrReg = MI.getOperand(1).getReg(); in lowerStore() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1840 const Register PtrReg = I.getOperand(1).getReg(); in select() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 4456 unsigned PtrReg = Use64BitPtr ? X86::RAX : X86::EAX; in Select() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 8541 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
9256 unsigned PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 2557 const Register PtrReg = I.getOperand(1).getReg(); in select() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 4608 unsigned PtrReg = Use64BitPtr ? X86::RAX : X86::EAX; in Select() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 10782 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
11593 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 11374 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitPartwordAtomicBinary() local
12371 Register PtrReg = RegInfo.createVirtualRegister(RC); in EmitInstrWithCustomInserter() local
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