1 /* 2 * Copyright (c) 2021, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef QOS_COMMON_H 8 #define QOS_COMMON_H 9 10 #define RCAR_REF_DEFAULT 0U 11 12 /* define used for get_refperiod. */ 13 /* REFPERIOD_CYCLE need smaller than QOSWT_WTSET0_CYCLEs */ 14 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF default */ 15 #define REFPERIOD_CYCLE /* unit:ns */ \ 16 ((126U * BASE_SUB_SLOT_NUM * 1000U) / 400U) 17 #else /* REF option */ 18 #define REFPERIOD_CYCLE /* unit:ns */ \ 19 ((252U * BASE_SUB_SLOT_NUM * 1000U) / 400U) 20 #endif 21 22 #if (RCAR_LSI == RCAR_AUTO) || (RCAR_LSI == RZ_G2M) 23 /* define used for G2M */ 24 #if (RCAR_REF_INT == RCAR_REF_DEFAULT) /* REF 1.95usec */ 25 #define SUB_SLOT_CYCLE_G2M_11 0x7EU /* 126 */ 26 #define SUB_SLOT_CYCLE_G2M_30 0x7EU /* 126 */ 27 #else /* REF 3.9usec */ 28 #define SUB_SLOT_CYCLE_G2M_11 0xFCU /* 252 */ 29 #define SUB_SLOT_CYCLE_G2M_30 0xFCU /* 252 */ 30 #endif /* (RCAR_REF_INT == RCAR_REF_DEFAULT) */ 31 32 #define SL_INIT_SSLOTCLK_G2M_11 (SUB_SLOT_CYCLE_G2M_11 - 1U) 33 #define SL_INIT_SSLOTCLK_G2M_30 (SUB_SLOT_CYCLE_G2M_30 - 1U) 34 #define QOSWT_WTSET0_CYCLE_G2M_11 /* unit:ns */ \ 35 ((SUB_SLOT_CYCLE_G2M_11 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ) 36 #define QOSWT_WTSET0_CYCLE_G2M_30 /* unit:ns */ \ 37 ((SUB_SLOT_CYCLE_G2M_30 * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ) 38 #endif 39 40 #define OPERATING_FREQ 400U /* MHz */ 41 #define BASE_SUB_SLOT_NUM 0x6U 42 #define SUB_SLOT_CYCLE 0x7EU /* 126 */ 43 44 #define QOSWT_WTSET0_CYCLE /* unit:ns */ \ 45 ((SUB_SLOT_CYCLE * BASE_SUB_SLOT_NUM * 1000U) / OPERATING_FREQ) 46 47 #define SL_INIT_REFFSSLOT (0x3U << 24U) 48 #define SL_INIT_SLOTSSLOT ((BASE_SUB_SLOT_NUM - 1U) << 16U) 49 #define SL_INIT_SSLOTCLK (SUB_SLOT_CYCLE - 1U) 50 51 typedef struct { 52 uintptr_t addr; 53 uint64_t value; 54 } mstat_slot_t; 55 56 struct rcar_gen3_dbsc_qos_settings { 57 uint32_t reg; 58 uint32_t val; 59 }; 60 61 extern uint32_t qos_init_ddr_ch; 62 extern uint8_t qos_init_ddr_phyvalid; 63 64 void rzg_qos_dbsc_setting(const struct rcar_gen3_dbsc_qos_settings *qos, 65 unsigned int qos_size, bool dbsc_wren); 66 67 #endif /* QOS_COMMON_H */ 68