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Searched defs:RBI (Results 1 – 25 of 51) sorted by relevance

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/external/llvm-project/llvm/lib/Target/PowerPC/GISel/
DPPCInstructionSelector.cpp48 const PPCRegisterBankInfo &RBI; member in __anon83597b350111::PPCInstructionSelector
67 const PPCRegisterBankInfo &RBI) in PPCInstructionSelector()
89 const PPCRegisterBankInfo &RBI) { in createPPCInstructionSelector()
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVInstructionSelector.cpp47 const RISCVRegisterBankInfo &RBI; member in __anonec89487d0111::RISCVInstructionSelector
71 const RISCVRegisterBankInfo &RBI) in RISCVInstructionSelector()
101 RISCVRegisterBankInfo &RBI) { in createRISCVInstructionSelector()
DRISCVSubtarget.cpp63 auto *RBI = new RISCVRegisterBankInfo(*getRegisterInfo()); in RISCVSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVInstructionSelector.cpp46 const RISCVRegisterBankInfo &RBI; member in __anon46b094710111::RISCVInstructionSelector
70 const RISCVRegisterBankInfo &RBI) in RISCVInstructionSelector()
100 RISCVRegisterBankInfo &RBI) { in createRISCVInstructionSelector()
DRISCVSubtarget.cpp59 auto *RBI = new RISCVRegisterBankInfo(*getRegisterInfo()); in RISCVSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DUtils.cpp32 const RegisterBankInfo &RBI, unsigned Reg, in constrainRegToClass()
43 const RegisterBankInfo &RBI, MachineInstr &InsertPt, in constrainOperandRegClass()
73 const RegisterBankInfo &RBI, MachineInstr &InsertPt, const MCInstrDesc &II, in constrainOperandRegClass()
114 const RegisterBankInfo &RBI) { in constrainSelectedInstRegOperands()
/external/llvm-project/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp76 const ARMRegisterBankInfo &RBI; member in __anon9959c9ef0111::ARMInstructionSelector
162 const ARMRegisterBankInfo &RBI) { in createARMInstructionSelector()
173 const ARMRegisterBankInfo &RBI) in ARMInstructionSelector()
188 const RegisterBankInfo &RBI) { in guessRegClass()
213 const RegisterBankInfo &RBI) { in selectCopy()
235 const RegisterBankInfo &RBI) { in selectMergeValues()
266 const RegisterBankInfo &RBI) { in selectUnmergeValues()
DARMSubtarget.cpp116 auto *RBI = new ARMRegisterBankInfo(*getRegisterInfo()); in ARMSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMInstructionSelector.cpp76 const ARMRegisterBankInfo &RBI; member in __anon71f13be30111::ARMInstructionSelector
162 const ARMRegisterBankInfo &RBI) { in createARMInstructionSelector()
175 const ARMRegisterBankInfo &RBI) in ARMInstructionSelector()
190 const RegisterBankInfo &RBI) { in guessRegClass()
215 const RegisterBankInfo &RBI) { in selectCopy()
237 const RegisterBankInfo &RBI) { in selectMergeValues()
268 const RegisterBankInfo &RBI) { in selectUnmergeValues()
DARMSubtarget.cpp116 auto *RBI = new ARMRegisterBankInfo(*getRegisterInfo()); in ARMSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsInstructionSelector.cpp57 const MipsRegisterBankInfo &RBI; member in __anon62fe57d50111::MipsInstructionSelector
76 const MipsRegisterBankInfo &RBI) in MipsInstructionSelector()
838 MipsRegisterBankInfo &RBI) { in createMipsInstructionSelector()
DMipsSubtarget.cpp214 auto *RBI = new MipsRegisterBankInfo(*getRegisterInfo()); in MipsSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.h195 const AMDGPURegisterBankInfo &RBI; variable
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DUtils.cpp38 const RegisterBankInfo &RBI, Register Reg, in constrainRegToClass()
49 const RegisterBankInfo &RBI, MachineInstr &InsertPt, in constrainOperandRegClass()
87 const RegisterBankInfo &RBI, MachineInstr &InsertPt, const MCInstrDesc &II, in constrainOperandRegClass()
128 const RegisterBankInfo &RBI) { in constrainSelectedInstRegOperands()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsInstructionSelector.cpp63 const MipsRegisterBankInfo &RBI; member in __anon06c298e10111::MipsInstructionSelector
82 const MipsRegisterBankInfo &RBI) in MipsInstructionSelector()
937 MipsRegisterBankInfo &RBI) { in createMipsInstructionSelector()
DMipsSubtarget.cpp214 auto *RBI = new MipsRegisterBankInfo(*getRegisterInfo()); in MipsSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64Subtarget.cpp182 auto *RBI = new AArch64RegisterBankInfo(*getRegisterInfo()); in AArch64Subtarget() local
DAArch64InstructionSelector.cpp294 const AArch64RegisterBankInfo &RBI; member in __anonb1ac26350111::AArch64InstructionSelector
317 const AArch64RegisterBankInfo &RBI) in AArch64InstructionSelector()
333 const RegisterBankInfo &RBI, in getRegClassForTypeOnBank()
431 const AArch64RegisterBankInfo &RBI, in unsupportedBinOp()
586 const RegisterBankInfo &RBI) { in isValidCopy()
621 const RegisterBankInfo &RBI, Register SrcReg, in selectSubregisterCopy()
647 const RegisterBankInfo &RBI) { in getRegClassesForCopy()
672 const RegisterBankInfo &RBI) { in selectCopy()
860 const RegisterBankInfo &RBI) { in selectSelectOpc()
4915 AArch64RegisterBankInfo &RBI) { in createAArch64InstructionSelector()
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCSubtarget.cpp63 auto *RBI = new PPCRegisterBankInfo(*getRegisterInfo()); in PPCSubtarget() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86Subtarget.cpp353 auto *RBI = new X86RegisterBankInfo(*getRegisterInfo()); in X86Subtarget() local
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64Subtarget.cpp220 auto *RBI = new AArch64RegisterBankInfo(*getRegisterInfo()); in AArch64Subtarget() local
/external/llvm-project/llvm/lib/Target/X86/
DX86Subtarget.cpp320 auto *RBI = new X86RegisterBankInfo(*getRegisterInfo()); in X86Subtarget() local
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.h321 const AMDGPURegisterBankInfo &RBI; variable
/external/llvm/include/llvm/CodeGen/GlobalISel/
DRegBankSelect.h456 const RegisterBankInfo *RBI; variable
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DRegBankSelect.h486 const RegisterBankInfo *RBI = nullptr; variable

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