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Searched defs:Rd (Results 1 – 25 of 37) sorted by relevance

12

/external/rust/crates/tokio/tests/
Dio_read_buf.rs13 struct Rd { in read_buf() struct
14 cnt: usize, in read_buf()
17 impl AsyncRead for Rd { in read_buf() implementation
Dio_read.rs14 struct Rd { in read() struct
15 poll_cnt: usize, in read()
18 impl AsyncRead for Rd { in read() implementation
Dio_copy.rs12 struct Rd(bool); in copy() struct
14 impl AsyncRead for Rd { in copy() implementation
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp158 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, in addIntraChainConstraint()
242 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, in addInterChainConstraint()
362 Register Rd = MI.getOperand(0).getReg(); in apply() local
372 Register Rd = MI.getOperand(0).getReg(); in apply() local
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp158 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, in addIntraChainConstraint()
242 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, in addInterChainConstraint()
362 Register Rd = MI.getOperand(0).getReg(); in apply() local
372 Register Rd = MI.getOperand(0).getReg(); in apply() local
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp159 bool A57ChainingConstraint::addIntraChainConstraint(PBQPRAGraph &G, unsigned Rd, in addIntraChainConstraint()
243 void A57ChainingConstraint::addInterChainConstraint(PBQPRAGraph &G, unsigned Rd, in addInterChainConstraint()
363 unsigned Rd = MI.getOperand(0).getReg(); in apply() local
373 unsigned Rd = MI.getOperand(0).getReg(); in apply() local
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp652 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction() local
743 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeThreeAddrSRegInstruction() local
805 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeMoveImmInstruction() local
1296 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAddSubERegInstruction() local
1353 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeLogicalImmInstruction() local
1384 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmInstruction() local
1423 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmTiedInstruction() local
1440 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAdrInstruction() local
1459 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeBaseAddSubImm() local
/external/capstone/arch/AArch64/
DAArch64Disassembler.c730 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction() local
835 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeThreeAddrSRegInstruction() local
899 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeMoveImmInstruction() local
1390 unsigned Rd, Rn, Rm; in DecodeAddSubERegInstruction() local
1450 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeLogicalImmInstruction() local
1483 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmInstruction() local
1523 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmTiedInstruction() local
1541 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAdrInstruction() local
1559 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeBaseAddSubImm() local
/external/capstone/arch/ARM/
DARMDisassembler.c1898 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeQADDInstruction() local
2103 unsigned Rd = fieldFromInstruction_4(Insn, 8, 4); in DecodeT2MOVTWInstruction() local
2127 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeArmMOVTWInstruction() local
2154 unsigned Rd = fieldFromInstruction_4(Insn, 16, 4); in DecodeSMLAInstruction() local
2296 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVLDInstruction() local
2630 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVSTInstruction() local
2902 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVLD1DupInstruction() local
2950 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVLD2DupInstruction() local
2999 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVLD3DupInstruction() local
3035 unsigned Rd = fieldFromInstruction_4(Insn, 12, 4); in DecodeVLD4DupInstruction() local
[all …]
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1844 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeQADDInstruction() local
2070 unsigned Rd = fieldFromInstruction(Insn, 8, 4); in DecodeT2MOVTWInstruction() local
2094 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeArmMOVTWInstruction() local
2121 unsigned Rd = fieldFromInstruction(Insn, 16, 4); in DecodeSMLAInstruction() local
2334 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLDInstruction() local
2659 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVSTInstruction() local
2930 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD1DupInstruction() local
2977 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD2DupInstruction() local
3025 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD3DupInstruction() local
3060 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD4DupInstruction() local
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp845 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction() local
936 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeThreeAddrSRegInstruction() local
998 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeMoveImmInstruction() local
1507 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAddSubERegInstruction() local
1564 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeLogicalImmInstruction() local
1595 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmInstruction() local
1634 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmTiedInstruction() local
1651 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAdrInstruction() local
1670 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAddSubImmShift() local
/external/llvm-project/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp848 unsigned Rd = fieldFromInstruction(Insn, 0, 5); in DecodeFMOVLaneInstruction() local
939 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeThreeAddrSRegInstruction() local
1001 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeMoveImmInstruction() local
1543 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAddSubERegInstruction() local
1600 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeLogicalImmInstruction() local
1631 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmInstruction() local
1670 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeModImmTiedInstruction() local
1687 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAdrInstruction() local
1706 unsigned Rd = fieldFromInstruction(insn, 0, 5); in DecodeAddSubImmShift() local
/external/llvm-project/lldb/source/Plugins/Instruction/ARM/
DEmulateInstructionARM.cpp1170 uint32_t Rd; // the destination register in EmulateADDRdSPImm() local
1231 uint32_t Rd; // the destination register in EmulateMOVRdSP() local
1291 uint32_t Rd; // the destination register in EmulateMOVRdRm() local
1379 uint32_t Rd; // the destination register in EmulateMOVRdImm() local
1621 uint32_t Rd; // the destination register in EmulateMVNImm() local
1683 uint32_t Rd; // the destination register in EmulateMVNReg() local
2400 uint32_t Rd; in EmulateSUBSPImm() local
3158 uint32_t Rd, Rn; in EmulateADDImmARM() local
3224 uint32_t Rd, Rn, Rm; in EmulateADDReg() local
3759 uint32_t Rd; // the destination register in EmulateShiftImm() local
[all …]
DEmulateInstructionARM.h205 const uint32_t Rd) { in WriteCoreReg()
/external/llvm-project/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2217 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeQADDInstruction() local
2443 unsigned Rd = fieldFromInstruction(Insn, 8, 4); in DecodeT2MOVTWInstruction() local
2467 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeArmMOVTWInstruction() local
2494 unsigned Rd = fieldFromInstruction(Insn, 16, 4); in DecodeSMLAInstruction() local
2706 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLDInstruction() local
3033 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVSTInstruction() local
3303 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD1DupInstruction() local
3350 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD2DupInstruction() local
3398 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD3DupInstruction() local
3433 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD4DupInstruction() local
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp2196 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeQADDInstruction() local
2422 unsigned Rd = fieldFromInstruction(Insn, 8, 4); in DecodeT2MOVTWInstruction() local
2446 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeArmMOVTWInstruction() local
2473 unsigned Rd = fieldFromInstruction(Insn, 16, 4); in DecodeSMLAInstruction() local
2685 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLDInstruction() local
3012 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVSTInstruction() local
3282 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD1DupInstruction() local
3329 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD2DupInstruction() local
3377 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD3DupInstruction() local
3412 unsigned Rd = fieldFromInstruction(Insn, 12, 4); in DecodeVLD4DupInstruction() local
[all …]
/external/swiftshader/third_party/subzero/src/
DIceAssemblerMIPS32.cpp271 const IValueT Rd = encodeGPRegister(OpRd, "Rd", InsnName); in emitRdRtSa() local
284 const IValueT Rd = encodeGPRegister(OpRd, "Rd", InsnName); in emitRdRsRt() local
527 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "clz"); in clz() local
657 const IValueT Rd = in jalr() local
774 IValueT Rd = encodeGPRegister(OpRd, "Rd", "mfhi"); in mfhi() local
781 IValueT Rd = encodeGPRegister(OpRd, "Rd", "mflo"); in mflo() local
821 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "pseudo-move"); in move() local
840 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movf"); in movf() local
875 const IValueT Rd = encodeGPRegister(OpRd, "Rd", "movt"); in movt() local
DIceAssemblerARM32.cpp799 IValueT Rd, IValueT Imm12, in emitType01()
821 IValueT Rd = encodeGPRegister(OpRd, "Rd", InstName); in emitType01() local
827 IValueT Rd, IValueT Rn, const Operand *OpSrc1, in emitType01()
931 constexpr IValueT Rd = RegARM32::Encoded_Reg_r0; in emitCompareOp() local
1063 void AssemblerARM32::emitDivOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, in emitDivOp()
1130 void AssemblerARM32::emitMulOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, in emitMulOp()
1160 IValueT Rd = encodeGPRegister(OpRd, "Rd", InstName); in emitSignExtend() local
1466 IValueT Rd = encodeGPRegister(OpRd, RdName, ClzName); in clz() local
1626 IValueT Rd = encodeGPRegister(OpRd, "Rd", InstName); in emitMemExOp() local
1694 IValueT Rd = encodeGPRegister(OpRd, "Rd", InstName); in emitShift() local
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/Disassembler/
DRISCVDisassembler.cpp296 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2() local
306 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2() local
/external/llvm-project/compiler-rt/lib/xray/
Dxray_mips.cpp47 encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd, in encodeSpecialInstruction()
Dxray_mips64.cpp48 encodeSpecialInstruction(uint32_t Opcode, uint32_t Rs, uint32_t Rt, uint32_t Rd, in encodeSpecialInstruction()
/external/llvm-project/llvm/lib/Target/RISCV/Disassembler/
DRISCVDisassembler.cpp336 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs2() local
346 unsigned Rd = fieldFromInstruction(Insn, 7, 5); in decodeRVCInstrRdRs1Rs2() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/Disassembler/
DMSP430Disassembler.cpp194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode() local
/external/llvm-project/llvm/lib/Target/MSP430/Disassembler/
DMSP430Disassembler.cpp194 unsigned Rd = fieldFromInstruction(Insn, 0, 4); in DecodeDstAddrMode() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/
DHexagonAsmParser.cpp1680 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local
1713 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local
1723 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local
1911 MCOperand &Rd = Inst.getOperand(0); in processInstruction() local

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