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Searched defs:Reg1 (Results 1 – 25 of 113) sorted by relevance

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/external/llvm-project/clang-tools-extra/test/clang-tidy/checkers/
Dllvm-prefer-register-over-unsigned.cpp24 unsigned Reg1 = getReg(); in apply_1() local
52 llvm::Register Reg1 = getReg(); in done_1() local
74 unsigned Reg1 = getRegLike(); in do_nothing_1() local
Dllvm-prefer-register-over-unsigned3.cpp14 unsigned Reg1 = getReg(); in do_nothing_1() local
/external/oboe/samples/RhythmGame/third_party/glm/simd/
Dinteger.h16 glm_uvec4 Reg1; in glm_i128_interleave() local
70 glm_uvec4 Reg1; in glm_i128_interleave2() local
/external/llvm-project/llvm/unittests/tools/llvm-exegesis/Mips/
DTargetTest.cpp91 const unsigned Reg1 = Mips::T1; in TEST_F() local
103 const unsigned Reg1 = Mips::T1_64; in TEST_F() local
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DLocked.cpp86 #define TestImplRegReg(Reg0, Value0, Reg1, Value1, Size) \ in TEST_F() argument
112 #define TestImplSize(Reg0, Reg1, Size) \ in TEST_F() argument
117 #define TestImpl(Reg0, Reg1) \ in TEST_F() argument
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DLocked.cpp89 #define TestImplRegReg(Reg0, Value0, Reg1, Value1, Size) \ in TEST_F() argument
110 #define TestImplSize(Reg0, Reg1, Size) \ in TEST_F() argument
115 #define TestImpl(Reg0, Reg1) \ in TEST_F() argument
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64FrameLowering.cpp506 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
519 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
557 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
568 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
1867 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
1890 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
1906 unsigned Reg1 = AArch64::NoRegister; member
2131 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
2239 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
/external/llvm-project/llvm/lib/Target/X86/
DX86ExpandPseudo.cpp379 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in ExpandMI() local
413 Register Reg1 = TRI->getSubReg(Reg, X86::sub_mask_1); in ExpandMI() local
DX86InstrBuilder.h165 unsigned Reg1, bool isKill1, in addRegReg()
/external/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp193 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR()
208 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX()
220 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR()
226 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRRX()
239 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI()
246 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp190 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR()
205 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX()
217 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR()
223 void MipsTargetStreamer::emitRRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRRX()
236 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI()
243 unsigned Reg1, int16_t Imm0, int16_t Imm1, in emitRRIII()
/external/llvm/lib/Target/Mips/
DMipsAsmPrinter.cpp769 unsigned Opcode, unsigned Reg1, in EmitInstrRegReg()
789 unsigned Opcode, unsigned Reg1, in EmitInstrRegRegReg()
800 unsigned MovOpc, unsigned Reg1, in EmitMovFPIntPair()
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64FrameLowering.cpp696 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(2).getReg()); in InsertSEH() local
709 Register Reg1 = MBBI->getOperand(2).getReg(); in InsertSEH() local
747 unsigned Reg1 = RegInfo->getSEHRegNum(MBBI->getOperand(1).getReg()); in InsertSEH() local
758 Register Reg1 = MBBI->getOperand(1).getReg(); in InsertSEH() local
2015 static bool invalidateWindowsRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateWindowsRegisterPairing()
2045 static bool invalidateRegisterPairing(unsigned Reg1, unsigned Reg2, in invalidateRegisterPairing()
2062 unsigned Reg1 = AArch64::NoRegister; member
2330 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
2438 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
/external/llvm-project/llvm/unittests/CodeGen/GlobalISel/
DPatternMatchTest.cpp166 Register Reg1; in TEST_F() local
191 Register Reg1; in TEST_F() local
/external/llvm/lib/Target/AArch64/
DAArch64FrameLowering.cpp875 unsigned Reg1; member
974 unsigned Reg1 = RPI.Reg1; in spillCalleeSavedRegisters() local
1037 unsigned Reg1 = RPI.Reg1; in restoreCalleeSavedRegisters() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMipsSizeReduction.cpp378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
406 Register Reg1 = MI1->getOperand(0).getReg(); in ConsecutiveInstr() local
478 Register Reg1 = MI1->getOperand(1).getReg(); in ReduceXWtoXWP() local
DMipsAsmPrinter.cpp875 unsigned Opcode, unsigned Reg1, in EmitInstrRegReg()
895 unsigned Opcode, unsigned Reg1, in EmitInstrRegRegReg()
906 unsigned MovOpc, unsigned Reg1, in EmitMovFPIntPair()
/external/llvm-project/llvm/lib/Target/Mips/
DMicroMipsSizeReduction.cpp378 static bool ConsecutiveRegisters(unsigned Reg1, unsigned Reg2) { in ConsecutiveRegisters()
406 Register Reg1 = MI1->getOperand(0).getReg(); in ConsecutiveInstr() local
478 Register Reg1 = MI1->getOperand(1).getReg(); in ReduceXWtoXWP() local
DMipsAsmPrinter.cpp875 unsigned Opcode, unsigned Reg1, in EmitInstrRegReg()
895 unsigned Opcode, unsigned Reg1, in EmitInstrRegRegReg()
906 unsigned MovOpc, unsigned Reg1, in EmitMovFPIntPair()
/external/llvm/lib/Target/X86/
DX86InstrBuilder.h144 unsigned Reg1, bool isKill1, in addRegReg()
/external/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp515 unsigned Reg1 = Reg; in lowerCRSpilling() local
560 unsigned Reg1 = Reg; in lowerCRRestore() local
604 unsigned Reg1 = Reg; in lowerCRBitSpilling() local
/external/llvm/lib/Target/Mips/MCTargetDesc/
DMipsTargetStreamer.cpp153 void MipsTargetStreamer::emitRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRR()
168 void MipsTargetStreamer::emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRX()
180 void MipsTargetStreamer::emitRRR(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRR()
186 void MipsTargetStreamer::emitRRI(unsigned Opcode, unsigned Reg0, unsigned Reg1, in emitRRI()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrBuilder.h165 unsigned Reg1, bool isKill1, in addRegReg()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.cpp668 unsigned Reg1 = Reg; in lowerCRSpilling() local
713 unsigned Reg1 = Reg; in lowerCRRestore() local
817 unsigned Reg1 = Reg; in lowerCRBitSpilling() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelDAGToDAG.cpp225 unsigned Reg1 = cast<RegisterSDNode>(V1)->getReg(); in tryInlineAsm() local

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