| /external/swiftshader/third_party/subzero/src/ |
| D | IceRegistersMIPS32.h | 68 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
74 static inline bool isGPRReg(RegNumT RegNum) { in isGPRReg()
82 static inline FPRRegister getEncodedFPR(RegNumT RegNum) { in getEncodedFPR()
88 static inline bool isFPRReg(RegNumT RegNum) { in isFPRReg()
93 static inline FPRRegister getEncodedFPR64(RegNumT RegNum) { in getEncodedFPR64()
99 static inline bool isFPR64Reg(RegNumT RegNum) { in isFPR64Reg()
106 static inline RegNumT get64PairFirstRegNum(RegNumT RegNum) { in get64PairFirstRegNum()
109 if (unsigned(RegNum) >= Reg_F64PAIR_First && in get64PairFirstRegNum() local
113 if (unsigned(RegNum) >= Reg_I64PAIR_First && unsigned(RegNum) <= Reg_T8T9) in get64PairFirstRegNum() local
119 static inline RegNumT get64PairSecondRegNum(RegNumT RegNum) { in get64PairSecondRegNum()
[all …]
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| D | IceRegistersARM32.h | 105 static inline void assertValidRegNum(RegNumT RegNum) { in assertValidRegNum()
110 static inline bool isGPRegister(RegNumT RegNum) { in isGPRegister()
125 static inline GPRRegister getEncodedGPR(RegNumT RegNum) { in getEncodedGPR()
140 static inline bool isGPR(RegNumT RegNum) { in isGPR()
145 static inline GPRRegister getI64PairFirstGPRNum(RegNumT RegNum) { in getI64PairFirstGPRNum()
150 static inline GPRRegister getI64PairSecondGPRNum(RegNumT RegNum) { in getI64PairSecondGPRNum()
155 static inline bool isI64RegisterPair(RegNumT RegNum) { in isI64RegisterPair()
160 static inline bool isEncodedSReg(RegNumT RegNum) { in isEncodedSReg()
175 static inline SRegister getEncodedSReg(RegNumT RegNum) { in getEncodedSReg()
180 static inline bool isEncodedDReg(RegNumT RegNum) { in isEncodedDReg()
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| D | IceRegAlloc.cpp | 434 const RegNumT RegNum = *RegNumBVIter(Iter.RegMask).begin(); in addSpillFill() local
621 const auto RegNum = Cur->getRegNum(); in allocatePrecoloredRegister() local
648 const RegNumT RegNum = in allocateFreeRegister() local
741 const auto RegNum = Item->getRegNumTmp(); in handleNoFreeRegisters() local
786 const auto RegNum = Item->getRegNumTmp(); in assignFinalRegisters() local
891 const RegNumT RegNum = Item->getRegNumTmp(); in scan() local
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| D | IceTargetLoweringX8664.cpp | 294 void TargetX8664::_push_reg(RegNumT RegNum) { in _push_reg()
312 void TargetX8664::_pop_reg(RegNumT RegNum) { in _pop_reg()
347 const auto RegNum = Var->getRegNum(); in isAssignedToRspOrRbp() local
462 RegNumT RegNum, RegNum32; in _sandbox_mem_reference() local
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.cpp | 42 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignArgRegs() local
67 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_SkipLastArgRegsPPCF128() local
93 unsigned RegNum = State.getFirstUnallocated(ArgRegs); in CC_PPC32_SVR4_Custom_AlignFPArgRegs() local
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| /external/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 61 int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const { in getDwarfRegNum()
72 int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const { in getLLVMRegNum()
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| /external/llvm-project/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum()
81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/ |
| D | MCRegisterInfo.cpp | 68 int MCRegisterInfo::getDwarfRegNum(MCRegister RegNum, bool isEH) const { in getDwarfRegNum()
81 Optional<unsigned> MCRegisterInfo::getLLVMRegNum(unsigned RegNum, in getLLVMRegNum()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 205 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
216 CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) { in CreateMemri()
337 int RegNum = matchFn(Name); in parseRegisterName() local
354 int RegNum = parseRegisterName(&MatchRegisterName); in parseRegisterName() local
363 int RegNum = AVR::NoRegister; in parseRegister() local
703 int64_t RegNum = Const->getValue(); in validateTargetOperandClass() local
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| /external/llvm-project/llvm/lib/Target/AVR/AsmParser/ |
| D | AVRAsmParser.cpp | 207 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
218 CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) { in CreateMemri()
339 int RegNum = matchFn(Name); in parseRegisterName() local
356 int RegNum = parseRegisterName(&MatchRegisterName); in parseRegisterName() local
365 int RegNum = AVR::NoRegister; in parseRegister() local
723 int64_t RegNum = Const->getValue(); in validateTargetOperandClass() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/AsmParser/ |
| D | MSP430AsmParser.cpp | 197 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
207 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem()
213 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg()
218 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg()
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| /external/llvm-project/llvm/lib/Target/MSP430/AsmParser/ |
| D | MSP430AsmParser.cpp | 199 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S, in CreateReg()
209 static std::unique_ptr<MSP430Operand> CreateMem(unsigned RegNum, in CreateMem()
215 static std::unique_ptr<MSP430Operand> CreateIndReg(unsigned RegNum, SMLoc S, in CreateIndReg()
220 static std::unique_ptr<MSP430Operand> CreatePostIndReg(unsigned RegNum, SMLoc S, in CreatePostIndReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRInstPrinter.cpp | 89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, in getPrettyRegisterName()
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| /external/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
| D | AVRInstPrinter.cpp | 89 const char *AVRInstPrinter::getPrettyRegisterName(unsigned RegNum, in getPrettyRegisterName()
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | InstructionSelectorImpl.h | 829 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
840 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
851 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | InstructionSelectorImpl.h | 898 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
909 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
920 int64_t RegNum = MatchTable[CurrentIdx++]; in executeMatchTable() local
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| /external/llvm-project/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.cpp | 34 unsigned RegNum) { in printRegister()
157 uint64_t RegNum = Data.getULEB128(C); in parse() local
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| /external/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 123 unsigned RegNum; member
698 unsigned RegNum; in parseRegister() local
719 bool LanaiAsmParser::ParseRegister(unsigned &RegNum, SMLoc &StartLoc, in ParseRegister()
730 OperandMatchResultTy LanaiAsmParser::tryParseRegister(unsigned &RegNum, in tryParseRegister()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 311 unsigned RegNum; member
337 unsigned RegNum; member
1814 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx, in CreateReg()
1833 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg()
1848 CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, in CreateVectorList()
2255 unsigned RegNum = 0; in matchRegisterNameAlias() local
2271 if (auto RegNum = StringSwitch<unsigned>(Name.lower()) in matchRegisterNameAlias() local
2297 AArch64AsmParser::tryParseScalarRegister(unsigned &RegNum) { in tryParseScalarRegister()
3146 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind); in tryParseVectorRegister() local
3171 unsigned RegNum; in tryParseSVEPredicateVector() local
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| /external/llvm-project/compiler-rt/lib/xray/ |
| D | xray_mips.cpp | 33 enum RegNum : uint32_t { enum
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| D | xray_mips64.cpp | 34 enum RegNum : uint32_t { enum
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| /external/llvm-project/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 345 unsigned RegNum; member
371 unsigned RegNum; member
1859 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx, in CreateReg()
1878 CreateVectorReg(unsigned RegNum, RegKind Kind, unsigned ElementWidth, in CreateVectorReg()
1893 CreateVectorList(unsigned RegNum, unsigned Count, unsigned NumElements, in CreateVectorList()
2306 unsigned RegNum = 0; in matchRegisterNameAlias() local
2322 if (auto RegNum = StringSwitch<unsigned>(Name.lower()) in matchRegisterNameAlias() local
2348 AArch64AsmParser::tryParseScalarRegister(unsigned &RegNum) { in tryParseScalarRegister()
3201 unsigned RegNum = matchRegisterNameAlias(Head, MatchKind); in tryParseVectorRegister() local
3226 unsigned RegNum; in tryParseSVEPredicateVector() local
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 205 unsigned RegNum; member
1767 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() local
1784 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() local
1801 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
1821 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
1844 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
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| /external/llvm-project/llvm/lib/Target/Hexagon/AsmParser/ |
| D | HexagonAsmParser.cpp | 207 unsigned RegNum; member
1779 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() local
1796 unsigned int RegNum = RI->getEncodingValue(Rs.getReg()); in processInstruction() local
1813 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
1833 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
1856 unsigned int RegNum = RI->getEncodingValue(Rt.getReg()); in processInstruction() local
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