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Searched defs:RegUnits (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DLiveRegUnits.h145 void addUnits(const BitVector &RegUnits) { in addUnits()
149 void removeUnits(const BitVector &RegUnits) { in removeUnits()
DRegisterScavenging.h194 void setUsed(const BitVector &RegUnits) { in setUsed()
197 void setUnused(const BitVector &RegUnits) { in setUnused()
/external/llvm-project/llvm/include/llvm/CodeGen/
DLiveRegUnits.h145 void addUnits(const BitVector &RegUnits) { in addUnits()
149 void removeUnits(const BitVector &RegUnits) { in removeUnits()
DRegisterScavenging.h185 void setUsed(const BitVector &RegUnits) { in setUsed()
188 void setUnused(const BitVector &RegUnits) { in setUnused()
/external/llvm/include/llvm/CodeGen/
DRegisterScavenging.h157 void setUsed(BitVector &RegUnits) { in setUsed()
160 void setUnused(BitVector &RegUnits) { in setUnused()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp702 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsDownwards()
784 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth()
823 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth()
830 SparseSet<LiveRegUnit> &RegUnits) { in updateDepths()
856 SparseSet<LiveRegUnit> RegUnits; in computeInstrDepths() local
894 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsUpwards()
1021 SparseSet<LiveRegUnit> RegUnits; in computeInstrHeights() local
DMachineCombiner.cpp443 SparseSet<LiveRegUnit> &RegUnits, in insertDeleteInstructions()
516 SparseSet<LiveRegUnit> RegUnits; in combineInstructions() local
DInterferenceCache.h92 SmallVector<RegUnitInfo, 4> RegUnits; variable
DRegisterPressure.cpp371 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
381 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in addRegLanes()
395 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, in setRegZero()
407 static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in removeRegLanes()
/external/llvm-project/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp702 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsDownwards()
783 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth()
822 SparseSet<LiveRegUnit> &RegUnits) { in updateDepth()
829 SparseSet<LiveRegUnit> &RegUnits) { in updateDepths()
855 SparseSet<LiveRegUnit> RegUnits; in computeInstrDepths() local
893 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsUpwards()
1021 SparseSet<LiveRegUnit> RegUnits; in computeInstrHeights() local
DMachineCombiner.cpp447 SparseSet<LiveRegUnit> &RegUnits, in insertDeleteInstructions()
520 SparseSet<LiveRegUnit> RegUnits; in combineInstructions() local
DInterferenceCache.h92 SmallVector<RegUnitInfo, 4> RegUnits; variable
DRegisterPressure.cpp371 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
381 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in addRegLanes()
395 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, in setRegZero()
407 static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in removeRegLanes()
/external/llvm-project/llvm/utils/TableGen/
DRegisterInfoEmitter.cpp191 const RegUnitSet &RegUnits = Bank.getRegSetAt(i); in runEnums() local
223 std::vector<unsigned> RegUnits; in EmitRegUnitPressure() local
274 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
290 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
DCodeGenRegisters.h281 RegUnitList RegUnits; member
553 SmallVector<RegUnit, 8> RegUnits; variable
/external/llvm/lib/CodeGen/
DMachineTraceMetrics.cpp696 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsDownwards()
797 SparseSet<LiveRegUnit> RegUnits; in computeInstrDepths() local
869 SparseSet<LiveRegUnit> &RegUnits, in updatePhysDepsUpwards()
997 SparseSet<LiveRegUnit> RegUnits; in computeInstrHeights() local
DInterferenceCache.h88 SmallVector<RegUnitInfo, 4> RegUnits; variable
DRegisterPressure.cpp329 static LaneBitmask getRegLanes(ArrayRef<RegisterMaskPair> RegUnits, in getRegLanes()
340 static void addRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in addRegLanes()
355 static void setRegZero(SmallVectorImpl<RegisterMaskPair> &RegUnits, in setRegZero()
368 static void removeRegLanes(SmallVectorImpl<RegisterMaskPair> &RegUnits, in removeRegLanes()
/external/capstone/
DMCRegisterInfo.h59 uint32_t RegUnits; member
/external/llvm/utils/TableGen/
DRegisterInfoEmitter.cpp204 std::vector<unsigned> RegUnits; in EmitRegUnitPressure() local
256 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
271 const RegUnitSet &RegUnits = RegBank.getRegSetAt(i); in EmitRegUnitPressure() local
DCodeGenRegisters.h254 RegUnitList RegUnits; member
499 SmallVector<RegUnit, 8> RegUnits; variable
DCodeGenRegisters.cpp196 static bool hasRegUnit(CodeGenRegister::RegUnitList &RegUnits, unsigned Unit) { in hasRegUnit()
1783 const auto &RegUnits = Register.getRegUnits(); in computeRegUnitLaneMasks() local
/external/llvm/include/llvm/MC/
DMCRegisterInfo.h116 uint32_t RegUnits; member
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCRegisterInfo.h109 uint32_t RegUnits; member
/external/llvm-project/llvm/include/llvm/MC/
DMCRegisterInfo.h109 uint32_t RegUnits; member

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