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Searched defs:RegisterBank (Results 1 – 13 of 13) sorted by relevance

/external/llvm/lib/CodeGen/GlobalISel/
DRegisterBank.cpp22 RegisterBank::RegisterBank() : ID(InvalidID), Name(nullptr), Size(0) {} in RegisterBank() function in RegisterBank
/external/llvm-project/llvm/utils/TableGen/
DRegisterBankEmitter.cpp29 class RegisterBank { class
44 RegisterBank(const Record &TheDef) in RegisterBank() function in __anon212f612d0111::RegisterBank
/external/llvm-project/llvm/lib/CodeGen/GlobalISel/
DRegisterBank.cpp23 RegisterBank::RegisterBank( in RegisterBank() function in RegisterBank
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DRegisterBank.cpp23 RegisterBank::RegisterBank( in RegisterBank() function in RegisterBank
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.h41 class RegisterBank; variable
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DCSEInfo.h164 class RegisterBank; variable
DRegisterBankInfo.h33 class RegisterBank; variable
/external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
DCSEInfo.h164 class RegisterBank; variable
DRegisterBankInfo.h33 class RegisterBank; variable
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPUInstructionSelector.h45 class RegisterBank; variable
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/MIRParser/
DMIParser.h26 class RegisterBank; variable
/external/llvm-project/llvm/include/llvm/CodeGen/MIRParser/
DMIParser.h27 class RegisterBank; variable
/external/vixl/src/aarch64/
Dregisters-aarch64.h75 enum RegisterBank : uint8_t { enum