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1 /*
2  * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef PLATFORM_DEF_H
8 #define PLATFORM_DEF_H
9 
10 #include <lib/utils_def.h>
11 
12 #include <sgi_soc_platform_def.h>
13 
14 #define PLAT_ARM_CLUSTER_COUNT		U(2)
15 #define CSS_SGI_MAX_CPUS_PER_CLUSTER	U(4)
16 #define CSS_SGI_MAX_PE_PER_CPU		U(1)
17 
18 #define PLAT_CSS_MHU_BASE		UL(0x45000000)
19 
20 /* Base address of DMC-620 instances */
21 #define SGI575_DMC620_BASE0		UL(0x4e000000)
22 #define SGI575_DMC620_BASE1		UL(0x4e100000)
23 
24 /* System power domain level */
25 #define CSS_SYSTEM_PWR_DMN_LVL		ARM_PWR_LVL2
26 
27 #define PLAT_MAX_PWR_LVL		ARM_PWR_LVL1
28 
29 /*
30  * Physical and virtual address space limits for MMU in AARCH64 & AARCH32 modes
31  */
32 #ifdef __aarch64__
33 #define PLAT_PHY_ADDR_SPACE_SIZE	(1ULL << 36)
34 #define PLAT_VIRT_ADDR_SPACE_SIZE	(1ULL << 36)
35 #else
36 #define PLAT_PHY_ADDR_SPACE_SIZE	(1ULL << 32)
37 #define PLAT_VIRT_ADDR_SPACE_SIZE	(1ULL << 32)
38 #endif
39 
40 /* GIC related constants */
41 #define PLAT_ARM_GICD_BASE		UL(0x30000000)
42 #define PLAT_ARM_GICC_BASE		UL(0x2C000000)
43 #define PLAT_ARM_GICR_BASE		UL(0x300C0000)
44 
45 #endif /* PLATFORM_DEF_H */
46