Searched defs:Shift1 (Results 1 – 6 of 6) sorted by relevance
| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | CombinerHelper.cpp | 1716 Register Shift1 = in applyShiftOfShiftedLogic() local
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructionSelector.cpp | 650 bool Shift1 = mi_match( in selectG_BUILD_VECTOR_TRUNC() local
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | DAGCombiner.cpp | 6040 SDValue Shift1 = N1.getOperand(0); in matchBSwapHWordOrAndAnd() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 26727 SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, in LowerShift() local
39096 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in combineMulSpecial() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 27814 SDValue Shift1 = getTargetVShiftByConstNode(X86OpcI, dl, VT, R, in LowerShift() local
42124 SDValue Shift1 = DAG.getNode(ISD::SHL, DL, VT, N->getOperand(0), in combineMulSpecial() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 20166 SDValue Shift1 = DAG.getNode(Op->getOpcode(), dl, VT, R, Splat1); in LowerShift() local
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