| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 757 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
795 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect()
2224 unsigned TrueReg, unsigned FalseReg, in selectReg()
2341 unsigned TrueReg = TRI->lookThruCopyLike(Reg, MRI); in getForwardingDefMI() local
2815 Register TrueReg = CompareUseMI.getOperand(1).getReg(); in convertToImmediateForm() local
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| D | PPCMIPeephole.cpp | 459 unsigned TrueReg = in simplifyCode() local
522 unsigned TrueReg = in simplifyCode() local
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| /external/llvm/include/llvm/Target/ |
| D | TargetInstrInfo.h | 690 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
714 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
|
| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCMIPeephole.cpp | 620 unsigned TrueReg = in simplifyCode() local
683 unsigned TrueReg = in simplifyCode() local
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| D | PPCInstrInfo.cpp | 1098 Register DstReg, Register TrueReg, in canInsertSelect()
1137 ArrayRef<MachineOperand> Cond, Register TrueReg, in insertSelect()
2664 unsigned TrueReg, unsigned FalseReg, in selectReg()
2782 unsigned TrueReg = TRI->lookThruCopyLike(Reg, MRI); in getForwardingDefMI() local
4097 Register TrueReg = CompareUseMI.getOperand(1).getReg(); in simplifyToLI() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.cpp | 687 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
728 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 847 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in canInsertSelect()
871 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 535 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
570 unsigned TrueReg, in insertSelect()
|
| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 535 Register DstReg, Register TrueReg, in canInsertSelect()
571 Register TrueReg, in insertSelect()
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | TargetInstrInfo.h | 856 Register TrueReg, Register FalseReg, in canInsertSelect()
880 Register TrueReg, Register FalseReg) const { in insertSelect()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 368 unsigned TrueReg, unsigned FalseReg, int &CondCycles, int &TrueCycles, in canInsertSelect()
411 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
|
| /external/llvm-project/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 902 unsigned TrueReg = getRegForValue(Select->getTrueValue()); in selectSelect() local
|
| D | WebAssemblyISelLowering.cpp | 377 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 724 unsigned TrueReg = getRegForValue(Select->getTrueValue()); in selectSelect() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyFastISel.cpp | 895 unsigned TrueReg = getRegForValue(Select->getTrueValue()); in selectSelect() local
|
| D | WebAssemblyISelLowering.cpp | 387 unsigned Tmp0, Tmp1, CmpReg, EqzReg, FalseReg, TrueReg; in LowerFPToInt() local
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 787 auto TrueReg = MIB.getReg(2); in selectSelect() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstructionSelector.cpp | 789 auto TrueReg = MIB->getOperand(2).getReg(); in selectSelect() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 823 unsigned TrueReg, in insertVectorSelect()
2128 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
2169 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 499 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
543 unsigned TrueReg, unsigned FalseReg) const { in insertSelect()
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| /external/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 4279 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
4316 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1036 Register TrueReg, in insertVectorSelect()
2459 Register DstReg, Register TrueReg, in canInsertSelect()
2502 Register TrueReg, Register FalseReg) const { in insertSelect()
|
| /external/llvm-project/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.cpp | 609 Register DstReg, Register TrueReg, in canInsertSelect()
660 Register TrueReg, Register FalseReg) const { in insertSelect()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 2832 unsigned TrueReg, unsigned FalseReg, in canInsertSelect()
2869 ArrayRef<MachineOperand> Cond, unsigned TrueReg, in insertSelect()
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86InstrInfo.cpp | 3307 Register DstReg, Register TrueReg, in canInsertSelect()
3345 ArrayRef<MachineOperand> Cond, Register TrueReg, in insertSelect()
|