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Searched defs:UseIdx (Results 1 – 25 of 72) sorted by relevance

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/external/llvm/include/llvm/MC/
DMCInstrItineraries.h187 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
208 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency()
DMCSubtargetInfo.h136 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrItineraries.h182 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
203 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency()
DMCSubtargetInfo.h177 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
/external/llvm-project/llvm/include/llvm/MC/
DMCInstrItineraries.h185 unsigned UseClass, unsigned UseIdx) const { in hasPipelineForwarding()
206 unsigned UseClass, unsigned UseIdx) const { in getOperandLatency()
DMCSubtargetInfo.h180 int getReadAdvanceCycles(const MCSchedClassDesc *SC, unsigned UseIdx, in getReadAdvanceCycles()
/external/llvm/lib/CodeGen/
DTargetSchedule.cpp144 unsigned UseIdx = 0; in findUseIdx() local
202 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
DRegisterCoalescer.cpp705 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
759 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1193 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1216 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1256 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1305 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
DLiveRangeCalc.cpp186 SlotIndex UseIdx; in extendToUses() local
DLiveRangeEdit.cpp120 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt()
/external/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp672 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
715 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
756 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
DPPCInstrInfo.h124 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
720 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
762 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local
DPPCInstrInfo.h218 SDNode *UseNode, unsigned UseIdx) const override { in getOperandLatency()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetSchedule.cpp174 unsigned UseIdx = 0; in findUseIdx() local
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
DMachineCopyPropagation.cpp386 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy()
403 unsigned UseIdx) { in isForwardableRegClassCopy()
DRegisterCoalescer.cpp848 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
902 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1620 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1654 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1693 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1749 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
DLiveRangeEdit.cpp141 SlotIndex UseIdx, bool cheapAsAMove) { in canRematerializeAt()
/external/llvm-project/llvm/lib/CodeGen/
DTargetSchedule.cpp174 unsigned UseIdx = 0; in findUseIdx() local
232 unsigned UseIdx = findUseIdx(UseMI, UseOperIdx); in computeOperandLatency() local
DLiveIntervalCalc.cpp181 SlotIndex UseIdx; in extendToUses() local
DMachineCopyPropagation.cpp387 const MachineInstr &Copy, const MachineInstr &UseI, unsigned UseIdx) { in isBackwardPropagatableRegClassCopy()
404 unsigned UseIdx) { in isForwardableRegClassCopy()
DRegisterCoalescer.cpp856 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI); in removeCopyByCommutingDef() local
911 SlotIndex UseIdx = LIS->getInstructionIndex(*UseMI).getRegSlot(true); in removeCopyByCommutingDef() local
1646 SlotIndex UseIdx = LIS->getInstructionIndex(MI); in eliminateUndefCopy() local
1680 void RegisterCoalescer::addUndefFlag(const LiveInterval &Int, SlotIndex UseIdx, in addUndefFlag()
1719 SlotIndex UseIdx = LIS->getInstructionIndex(MI).getRegSlot(true); in updateRegDefsUses() local
1775 SlotIndex UseIdx = MIIdx.getRegSlot(true); in updateRegDefsUses() local
/external/llvm-project/llvm/lib/IR/
DAbstractCallSite.cpp101 unsigned UseIdx = CB->getArgOperandNo(U); in AbstractCallSite() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DAbstractCallSite.cpp100 unsigned UseIdx = CS.getArgumentNo(U); in AbstractCallSite() local
/external/llvm-project/llvm/lib/Target/PowerPC/
DPPCVSXSwapRemoval.cpp677 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
743 int UseIdx = SwapMap[&UseMI]; in recordUnoptimizableWebs() local
785 int UseIdx = SwapMap[&UseMI]; in markSwapsForRemoval() local

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