| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | MIRVRegNamerUtils.cpp | 30 VRegRenamer::getVRegRenameMap(const std::vector<NamedVReg> &VRegs) { in getVRegRenameMap()
130 std::vector<NamedVReg> VRegs; in renameInstsInMBB() local
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| D | SwiftErrorValueTracking.cpp | 181 SmallVector<std::pair<MachineBasicBlock *, Register>, 4> VRegs; in propagateVRegs() local
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | MIRVRegNamerUtils.cpp | 38 VRegRenamer::getVRegRenameMap(const std::vector<NamedVReg> &VRegs) { in getVRegRenameMap()
146 std::vector<NamedVReg> VRegs; in renameInstsInMBB() local
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| D | SwiftErrorValueTracking.cpp | 181 SmallVector<std::pair<MachineBasicBlock *, Register>, 4> VRegs; in propagateVRegs() local
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| D | MachineVerifier.cpp | 2306 SmallVector<Register, 0> VRegs; member in __anone0609c9c0411::FilteringVRegSet
2338 FilteringVRegSet VRegs; in calcRegsPassed() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CallLowering.h | 265 ArrayRef<Register> VRegs, in lowerReturn()
277 ArrayRef<Register> VRegs) const { in lowerReturn()
293 ArrayRef<ArrayRef<Register>> VRegs) const { in lowerFormalArguments()
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| /external/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CallLowering.h | 304 ArrayRef<Register> VRegs, in lowerReturn()
316 ArrayRef<Register> VRegs) const { in lowerReturn()
334 ArrayRef<ArrayRef<Register>> VRegs) const { in lowerFormalArguments()
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| /external/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| D | PPCCallLowering.cpp | 27 const Value *Val, ArrayRef<Register> VRegs, in lowerReturn()
|
| /external/llvm/include/llvm/CodeGen/GlobalISel/ |
| D | CallLowering.h | 66 const SmallVectorImpl<unsigned> &VRegs) const { in lowerFormalArguments()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 39 bool MipsCallLowering::MipsHandler::assignVRegs(ArrayRef<Register> VRegs, in assignVRegs()
50 SmallVectorImpl<Register> &VRegs) { in setLeastSignificantFirst()
57 SmallVector<Register, 4> VRegs; in handle() local
213 bool IncomingValueHandler::handleSplit(SmallVectorImpl<Register> &VRegs, in handleSplit()
349 bool OutgoingValueHandler::handleSplit(SmallVectorImpl<Register> &VRegs, in handleSplit()
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsCallLowering.cpp | 39 bool MipsCallLowering::MipsHandler::assignVRegs(ArrayRef<Register> VRegs, in assignVRegs()
50 SmallVectorImpl<Register> &VRegs) { in setLeastSignificantFirst()
57 SmallVector<Register, 4> VRegs; in handle() local
201 bool MipsIncomingValueHandler::handleSplit(SmallVectorImpl<Register> &VRegs, in handleSplit()
312 bool MipsOutgoingValueHandler::handleSplit(SmallVectorImpl<Register> &VRegs, in handleSplit()
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 193 auto *VRegs = VMap.getVRegs(Val); in getOrCreateVRegs() local
356 ArrayRef<Register> VRegs; in translateRet() local
1761 SmallVector<llvm::SrcOp, 4> VRegs; in translateSimpleIntrinsic() local
1804 SmallVector<llvm::SrcOp, 4> VRegs; in translateConstrainedFPIntrinsic() local
2325 ArrayRef<Register> VRegs = getOrCreateVRegs(*Arg.value()); in translateCall() local
3052 ArrayRef<Register> VRegs = getOrCreateVRegs(Arg); in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
| D | IRTranslator.cpp | 183 auto *VRegs = VMap.getVRegs(Val); in getOrCreateVRegs() local
369 ArrayRef<Register> VRegs; in translateRet() local
1276 SmallVector<llvm::SrcOp, 4> VRegs; in translateSimpleIntrinsic() local
1661 ArrayRef<Register> VRegs = getOrCreateVRegs(*Arg.value()); in translateCall() local
2327 ArrayRef<Register> VRegs = getOrCreateVRegs(Arg); in runOnMachineFunction() local
|
| /external/capstone/arch/PowerPC/ |
| D | PPCDisassembler.c | 65 static const unsigned VRegs[] = { variable
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| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 92 static const unsigned VRegs[] = { variable
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 238 const Value *Val, ArrayRef<Register> VRegs, in lowerReturnVal()
|
| /external/llvm-project/llvm/lib/Target/ARM/ |
| D | ARMCallLowering.cpp | 237 const Value *Val, ArrayRef<Register> VRegs, in lowerReturnVal()
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| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 725 SmallVectorImpl<Register> &VRegs) { in extractParts()
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| D | AArch64CallLowering.cpp | 276 ArrayRef<Register> VRegs, in lowerReturn()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64CallLowering.cpp | 258 ArrayRef<Register> VRegs, in lowerReturn()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 262 const Value *Val, ArrayRef<Register> VRegs, in lowerReturnVal()
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCallLowering.cpp | 419 const Value *Val, ArrayRef<Register> VRegs, in lowerReturnVal()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 1485 SmallVector<CalleeSavedInfo, 18> VRegs; in processFunctionBeforeFrameFinalized() local
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 86 static const MCPhysReg VRegs[32] = { variable
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCFrameLowering.cpp | 1881 SmallVector<CalleeSavedInfo, 18> VRegs; in processFunctionBeforeFrameFinalized() local
|