1 /****************************************************************************
2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 ***************************************************************************/
23
24 #ifndef SWR_STATE_H
25 #define SWR_STATE_H
26
27 #include "pipe/p_defines.h"
28 #include "tgsi/tgsi_scan.h"
29 #include "tgsi/tgsi_parse.h"
30 #include "tgsi/tgsi_dump.h"
31 #include "gallivm/lp_bld_init.h"
32 #include "gallivm/lp_bld_tgsi.h"
33 #include "util/crc32.h"
34 #include "api.h"
35 #include "swr_tex_sample.h"
36 #include "swr_shader.h"
37 #include <unordered_map>
38 #include <memory>
39
40 template <typename T>
41 struct ShaderVariant {
42 struct gallivm_state *gallivm;
43 T shader;
44
ShaderVariantShaderVariant45 ShaderVariant(struct gallivm_state *gs, T code) : gallivm(gs), shader(code) {}
~ShaderVariantShaderVariant46 ~ShaderVariant() { gallivm_destroy(gallivm); }
47 };
48
49 using PFN_TCS_FUNC = PFN_HS_FUNC;
50 using PFN_TES_FUNC = PFN_DS_FUNC;
51
52 typedef ShaderVariant<PFN_VERTEX_FUNC> VariantVS;
53 typedef ShaderVariant<PFN_PIXEL_KERNEL> VariantFS;
54 typedef ShaderVariant<PFN_GS_FUNC> VariantGS;
55 typedef ShaderVariant<PFN_TCS_FUNC> VariantTCS;
56 typedef ShaderVariant<PFN_TES_FUNC> VariantTES;
57
58 /* skeleton */
59 struct swr_vertex_shader {
60 struct pipe_shader_state pipe;
61 struct lp_tgsi_info info;
62 std::unordered_map<swr_jit_vs_key, std::unique_ptr<VariantVS>> map;
63 SWR_STREAMOUT_STATE soState;
64 PFN_SO_FUNC soFunc[PIPE_PRIM_MAX] {0};
65 };
66
67 struct swr_fragment_shader {
68 struct pipe_shader_state pipe;
69 struct lp_tgsi_info info;
70 uint32_t constantMask;
71 uint32_t flatConstantMask;
72 uint32_t pointSpriteMask;
73 std::unordered_map<swr_jit_fs_key, std::unique_ptr<VariantFS>> map;
74 };
75
76 struct swr_geometry_shader {
77 struct pipe_shader_state pipe;
78 struct lp_tgsi_info info;
79 SWR_GS_STATE gsState;
80
81 std::unordered_map<swr_jit_gs_key, std::unique_ptr<VariantGS>> map;
82 };
83
84 struct swr_tess_control_shader {
85 struct pipe_shader_state pipe;
86 struct lp_tgsi_info info;
87 uint32_t vertices_per_patch;
88
89 std::unordered_map<swr_jit_tcs_key, std::unique_ptr<VariantTCS>> map;
90 };
91
92 struct swr_tess_evaluation_shader {
93 struct pipe_shader_state pipe;
94 struct lp_tgsi_info info;
95 SWR_TS_STATE ts_state;
96
97 std::unordered_map<swr_jit_tes_key, std::unique_ptr<VariantTES>> map;
98 };
99
100
101 /* Vertex element state */
102 struct swr_vertex_element_state {
103 FETCH_COMPILE_STATE fsState;
104 PFN_FETCH_FUNC fsFunc {NULL};
105 uint32_t stream_pitch[PIPE_MAX_ATTRIBS] {0};
106 uint32_t min_instance_div[PIPE_MAX_ATTRIBS] {0};
107 uint32_t instanced_bufs {0};
108 std::unordered_map<swr_jit_fetch_key, PFN_FETCH_FUNC> map;
109 };
110
111 struct swr_blend_state {
112 struct pipe_blend_state pipe;
113 SWR_BLEND_STATE blendState;
114 RENDER_TARGET_BLEND_COMPILE_STATE compileState[PIPE_MAX_COLOR_BUFS];
115 };
116
117 struct swr_poly_stipple {
118 struct pipe_poly_stipple pipe;
119 bool prim_is_poly;
120 };
121
122 /*
123 * Derived SWR API DrawState
124 * For convenience of making simple changes without re-deriving state.
125 */
126 struct swr_derived_state {
127 SWR_RASTSTATE rastState;
128 SWR_VIEWPORT vp[KNOB_NUM_VIEWPORTS_SCISSORS];
129 SWR_VIEWPORT_MATRICES vpm;
130 };
131
132 void swr_update_derived(struct pipe_context *,
133 const struct pipe_draw_info * = nullptr);
134
135 /*
136 * Conversion functions: Convert mesa state defines to SWR.
137 */
138
139 static INLINE SWR_LOGIC_OP
swr_convert_logic_op(const UINT op)140 swr_convert_logic_op(const UINT op)
141 {
142 switch (op) {
143 case PIPE_LOGICOP_CLEAR:
144 return LOGICOP_CLEAR;
145 case PIPE_LOGICOP_NOR:
146 return LOGICOP_NOR;
147 case PIPE_LOGICOP_AND_INVERTED:
148 return LOGICOP_AND_INVERTED;
149 case PIPE_LOGICOP_COPY_INVERTED:
150 return LOGICOP_COPY_INVERTED;
151 case PIPE_LOGICOP_AND_REVERSE:
152 return LOGICOP_AND_REVERSE;
153 case PIPE_LOGICOP_INVERT:
154 return LOGICOP_INVERT;
155 case PIPE_LOGICOP_XOR:
156 return LOGICOP_XOR;
157 case PIPE_LOGICOP_NAND:
158 return LOGICOP_NAND;
159 case PIPE_LOGICOP_AND:
160 return LOGICOP_AND;
161 case PIPE_LOGICOP_EQUIV:
162 return LOGICOP_EQUIV;
163 case PIPE_LOGICOP_NOOP:
164 return LOGICOP_NOOP;
165 case PIPE_LOGICOP_OR_INVERTED:
166 return LOGICOP_OR_INVERTED;
167 case PIPE_LOGICOP_COPY:
168 return LOGICOP_COPY;
169 case PIPE_LOGICOP_OR_REVERSE:
170 return LOGICOP_OR_REVERSE;
171 case PIPE_LOGICOP_OR:
172 return LOGICOP_OR;
173 case PIPE_LOGICOP_SET:
174 return LOGICOP_SET;
175 default:
176 assert(0 && "Unsupported logic op");
177 return LOGICOP_NOOP;
178 }
179 }
180
181 static INLINE SWR_STENCILOP
swr_convert_stencil_op(const UINT op)182 swr_convert_stencil_op(const UINT op)
183 {
184 switch (op) {
185 case PIPE_STENCIL_OP_KEEP:
186 return STENCILOP_KEEP;
187 case PIPE_STENCIL_OP_ZERO:
188 return STENCILOP_ZERO;
189 case PIPE_STENCIL_OP_REPLACE:
190 return STENCILOP_REPLACE;
191 case PIPE_STENCIL_OP_INCR:
192 return STENCILOP_INCRSAT;
193 case PIPE_STENCIL_OP_DECR:
194 return STENCILOP_DECRSAT;
195 case PIPE_STENCIL_OP_INCR_WRAP:
196 return STENCILOP_INCR;
197 case PIPE_STENCIL_OP_DECR_WRAP:
198 return STENCILOP_DECR;
199 case PIPE_STENCIL_OP_INVERT:
200 return STENCILOP_INVERT;
201 default:
202 assert(0 && "Unsupported stencil op");
203 return STENCILOP_KEEP;
204 }
205 }
206
207 static INLINE SWR_FORMAT
swr_convert_index_type(const UINT index_size)208 swr_convert_index_type(const UINT index_size)
209 {
210 switch (index_size) {
211 case sizeof(unsigned char):
212 return R8_UINT;
213 case sizeof(unsigned short):
214 return R16_UINT;
215 case sizeof(unsigned int):
216 return R32_UINT;
217 default:
218 assert(0 && "Unsupported index type");
219 return R32_UINT;
220 }
221 }
222
223
224 static INLINE SWR_ZFUNCTION
swr_convert_depth_func(const UINT pipe_func)225 swr_convert_depth_func(const UINT pipe_func)
226 {
227 switch (pipe_func) {
228 case PIPE_FUNC_NEVER:
229 return ZFUNC_NEVER;
230 case PIPE_FUNC_LESS:
231 return ZFUNC_LT;
232 case PIPE_FUNC_EQUAL:
233 return ZFUNC_EQ;
234 case PIPE_FUNC_LEQUAL:
235 return ZFUNC_LE;
236 case PIPE_FUNC_GREATER:
237 return ZFUNC_GT;
238 case PIPE_FUNC_NOTEQUAL:
239 return ZFUNC_NE;
240 case PIPE_FUNC_GEQUAL:
241 return ZFUNC_GE;
242 case PIPE_FUNC_ALWAYS:
243 return ZFUNC_ALWAYS;
244 default:
245 assert(0 && "Unsupported depth func");
246 return ZFUNC_ALWAYS;
247 }
248 }
249
250
251 static INLINE SWR_CULLMODE
swr_convert_cull_mode(const UINT cull_face)252 swr_convert_cull_mode(const UINT cull_face)
253 {
254 switch (cull_face) {
255 case PIPE_FACE_NONE:
256 return SWR_CULLMODE_NONE;
257 case PIPE_FACE_FRONT:
258 return SWR_CULLMODE_FRONT;
259 case PIPE_FACE_BACK:
260 return SWR_CULLMODE_BACK;
261 case PIPE_FACE_FRONT_AND_BACK:
262 return SWR_CULLMODE_BOTH;
263 default:
264 assert(0 && "Invalid cull mode");
265 return SWR_CULLMODE_NONE;
266 }
267 }
268
269 static INLINE SWR_BLEND_OP
swr_convert_blend_func(const UINT blend_func)270 swr_convert_blend_func(const UINT blend_func)
271 {
272 switch (blend_func) {
273 case PIPE_BLEND_ADD:
274 return BLENDOP_ADD;
275 case PIPE_BLEND_SUBTRACT:
276 return BLENDOP_SUBTRACT;
277 case PIPE_BLEND_REVERSE_SUBTRACT:
278 return BLENDOP_REVSUBTRACT;
279 case PIPE_BLEND_MIN:
280 return BLENDOP_MIN;
281 case PIPE_BLEND_MAX:
282 return BLENDOP_MAX;
283 default:
284 assert(0 && "Invalid blend func");
285 return BLENDOP_ADD;
286 }
287 }
288
289 static INLINE SWR_BLEND_FACTOR
swr_convert_blend_factor(const UINT blend_factor)290 swr_convert_blend_factor(const UINT blend_factor)
291 {
292 switch (blend_factor) {
293 case PIPE_BLENDFACTOR_ONE:
294 return BLENDFACTOR_ONE;
295 case PIPE_BLENDFACTOR_SRC_COLOR:
296 return BLENDFACTOR_SRC_COLOR;
297 case PIPE_BLENDFACTOR_SRC_ALPHA:
298 return BLENDFACTOR_SRC_ALPHA;
299 case PIPE_BLENDFACTOR_DST_ALPHA:
300 return BLENDFACTOR_DST_ALPHA;
301 case PIPE_BLENDFACTOR_DST_COLOR:
302 return BLENDFACTOR_DST_COLOR;
303 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
304 return BLENDFACTOR_SRC_ALPHA_SATURATE;
305 case PIPE_BLENDFACTOR_CONST_COLOR:
306 return BLENDFACTOR_CONST_COLOR;
307 case PIPE_BLENDFACTOR_CONST_ALPHA:
308 return BLENDFACTOR_CONST_ALPHA;
309 case PIPE_BLENDFACTOR_SRC1_COLOR:
310 return BLENDFACTOR_SRC1_COLOR;
311 case PIPE_BLENDFACTOR_SRC1_ALPHA:
312 return BLENDFACTOR_SRC1_ALPHA;
313 case PIPE_BLENDFACTOR_ZERO:
314 return BLENDFACTOR_ZERO;
315 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
316 return BLENDFACTOR_INV_SRC_COLOR;
317 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
318 return BLENDFACTOR_INV_SRC_ALPHA;
319 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
320 return BLENDFACTOR_INV_DST_ALPHA;
321 case PIPE_BLENDFACTOR_INV_DST_COLOR:
322 return BLENDFACTOR_INV_DST_COLOR;
323 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
324 return BLENDFACTOR_INV_CONST_COLOR;
325 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
326 return BLENDFACTOR_INV_CONST_ALPHA;
327 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
328 return BLENDFACTOR_INV_SRC1_COLOR;
329 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
330 return BLENDFACTOR_INV_SRC1_ALPHA;
331 default:
332 assert(0 && "Invalid blend factor");
333 return BLENDFACTOR_ONE;
334 }
335 }
336
337 static INLINE enum SWR_SURFACE_TYPE
swr_convert_target_type(const enum pipe_texture_target target)338 swr_convert_target_type(const enum pipe_texture_target target)
339 {
340 switch (target) {
341 case PIPE_BUFFER:
342 return SURFACE_BUFFER;
343 case PIPE_TEXTURE_1D:
344 case PIPE_TEXTURE_1D_ARRAY:
345 return SURFACE_1D;
346 case PIPE_TEXTURE_2D:
347 case PIPE_TEXTURE_2D_ARRAY:
348 case PIPE_TEXTURE_RECT:
349 return SURFACE_2D;
350 case PIPE_TEXTURE_3D:
351 return SURFACE_3D;
352 case PIPE_TEXTURE_CUBE:
353 case PIPE_TEXTURE_CUBE_ARRAY:
354 return SURFACE_CUBE;
355 default:
356 assert(0);
357 return SURFACE_NULL;
358 }
359 }
360
361 /*
362 * Convert mesa PIPE_PRIM_X to SWR enum PRIMITIVE_TOPOLOGY
363 */
364 static INLINE enum PRIMITIVE_TOPOLOGY
swr_convert_prim_topology(const unsigned mode,const unsigned tcs_verts)365 swr_convert_prim_topology(const unsigned mode, const unsigned tcs_verts)
366 {
367 switch (mode) {
368 case PIPE_PRIM_POINTS:
369 return TOP_POINT_LIST;
370 case PIPE_PRIM_LINES:
371 return TOP_LINE_LIST;
372 case PIPE_PRIM_LINE_LOOP:
373 return TOP_LINE_LOOP;
374 case PIPE_PRIM_LINE_STRIP:
375 return TOP_LINE_STRIP;
376 case PIPE_PRIM_TRIANGLES:
377 return TOP_TRIANGLE_LIST;
378 case PIPE_PRIM_TRIANGLE_STRIP:
379 return TOP_TRIANGLE_STRIP;
380 case PIPE_PRIM_TRIANGLE_FAN:
381 return TOP_TRIANGLE_FAN;
382 case PIPE_PRIM_QUADS:
383 return TOP_QUAD_LIST;
384 case PIPE_PRIM_QUAD_STRIP:
385 return TOP_QUAD_STRIP;
386 case PIPE_PRIM_POLYGON:
387 return TOP_TRIANGLE_FAN; /* XXX TOP_POLYGON; */
388 case PIPE_PRIM_LINES_ADJACENCY:
389 return TOP_LINE_LIST_ADJ;
390 case PIPE_PRIM_LINE_STRIP_ADJACENCY:
391 return TOP_LISTSTRIP_ADJ;
392 case PIPE_PRIM_TRIANGLES_ADJACENCY:
393 return TOP_TRI_LIST_ADJ;
394 case PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY:
395 return TOP_TRI_STRIP_ADJ;
396 case PIPE_PRIM_PATCHES:
397 // rasterizer has a separate type for each possible number of patch vertices
398 return (PRIMITIVE_TOPOLOGY)((unsigned)TOP_PATCHLIST_BASE + tcs_verts);
399 default:
400 assert(0 && "Unknown topology");
401 return TOP_UNKNOWN;
402 }
403 };
404
405 /*
406 * convert mesa PIPE_POLYGON_MODE_X to SWR enum SWR_FILLMODE
407 */
408 static INLINE enum SWR_FILLMODE
swr_convert_fill_mode(const unsigned mode)409 swr_convert_fill_mode(const unsigned mode)
410 {
411 switch(mode) {
412 case PIPE_POLYGON_MODE_FILL:
413 return SWR_FILLMODE_SOLID;
414 case PIPE_POLYGON_MODE_LINE:
415 return SWR_FILLMODE_WIREFRAME;
416 case PIPE_POLYGON_MODE_POINT:
417 return SWR_FILLMODE_POINT;
418 default:
419 assert(0 && "Unknown fillmode");
420 return SWR_FILLMODE_SOLID; // at least do something sensible
421 }
422 }
423
424
425 #endif
426