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1 /*
2  * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #ifndef BL_COMMON_H
8 #define BL_COMMON_H
9 
10 #include <common/ep_info.h>
11 #include <common/param_header.h>
12 #include <lib/utils_def.h>
13 
14 #ifndef __ASSEMBLER__
15 #include <stddef.h>
16 #include <stdint.h>
17 #include <lib/cassert.h>
18 #endif /* __ASSEMBLER__ */
19 
20 #include <export/common/bl_common_exp.h>
21 
22 #define UP	U(1)
23 #define DOWN	U(0)
24 
25 /*******************************************************************************
26  * Constants to identify the location of a memory region in a given memory
27  * layout.
28 ******************************************************************************/
29 #define TOP	U(0x1)
30 #define BOTTOM	U(0x0)
31 
32 /*******************************************************************************
33  * Constants to indicate type of exception to the common exception handler.
34  ******************************************************************************/
35 #define SYNC_EXCEPTION_SP_EL0		U(0x0)
36 #define IRQ_SP_EL0			U(0x1)
37 #define FIQ_SP_EL0			U(0x2)
38 #define SERROR_SP_EL0			U(0x3)
39 #define SYNC_EXCEPTION_SP_ELX		U(0x4)
40 #define IRQ_SP_ELX			U(0x5)
41 #define FIQ_SP_ELX			U(0x6)
42 #define SERROR_SP_ELX			U(0x7)
43 #define SYNC_EXCEPTION_AARCH64		U(0x8)
44 #define IRQ_AARCH64			U(0x9)
45 #define FIQ_AARCH64			U(0xa)
46 #define SERROR_AARCH64			U(0xb)
47 #define SYNC_EXCEPTION_AARCH32		U(0xc)
48 #define IRQ_AARCH32			U(0xd)
49 #define FIQ_AARCH32			U(0xe)
50 #define SERROR_AARCH32			U(0xf)
51 
52 /*
53  * Mapping to connect linker symbols from .ld.S with their counterparts
54  * from .scat for the BL31 image
55  */
56 #if defined(USE_ARM_LINK)
57 #define __BL31_END__			Load$$LR$$LR_END$$Base
58 #define __BSS_START__			Load$$LR$$LR_BSS$$Base
59 #define __BSS_END__			Load$$LR$$LR_BSS$$Limit
60 #define __BSS_SIZE__			Load$$LR$$LR_BSS$$Length
61 #define __COHERENT_RAM_START__		Load$$LR$$LR_COHERENT_RAM$$Base
62 #define __COHERENT_RAM_END_UNALIGNED__	Load$$__COHERENT_RAM_EPILOGUE_UNALIGNED__$$Base
63 #define __COHERENT_RAM_END__		Load$$LR$$LR_COHERENT_RAM$$Limit
64 #define __COHERENT_RAM_UNALIGNED_SIZE__	Load$$__COHERENT_RAM__$$Length
65 #define __CPU_OPS_START__		Load$$__CPU_OPS__$$Base
66 #define __CPU_OPS_END__			Load$$__CPU_OPS__$$Limit
67 #define __DATA_START__			Load$$__DATA__$$Base
68 #define __DATA_END__			Load$$__DATA__$$Limit
69 #define __GOT_START__			Load$$__GOT__$$Base
70 #define __GOT_END__			Load$$__GOT__$$Limit
71 #define __PERCPU_BAKERY_LOCK_START__	Load$$__BAKERY_LOCKS__$$Base
72 #define __PERCPU_BAKERY_LOCK_END__	Load$$__BAKERY_LOCKS_EPILOGUE__$$Base
73 #define __PMF_SVC_DESCS_START__		Load$$__PMF_SVC_DESCS__$$Base
74 #define __PMF_SVC_DESCS_END__		Load$$__PMF_SVC_DESCS__$$Limit
75 #define __PMF_TIMESTAMP_START__		Load$$__PMF_TIMESTAMP__$$Base
76 #define __PMF_TIMESTAMP_END__		Load$$__PER_CPU_TIMESTAMPS__$$Limit
77 #define __PMF_PERCPU_TIMESTAMP_END__	Load$$__PMF_TIMESTAMP_EPILOGUE__$$Base
78 #define __RELA_END__			Load$$__RELA__$$Limit
79 #define __RELA_START__			Load$$__RELA__$$Base
80 #define __RODATA_START__		Load$$__RODATA__$$Base
81 #define __RODATA_END__			Load$$__RODATA_EPILOGUE__$$Base
82 #define __RT_SVC_DESCS_START__		Load$$__RT_SVC_DESCS__$$Base
83 #define __RT_SVC_DESCS_END__		Load$$__RT_SVC_DESCS__$$Limit
84 #define __RW_START__			Load$$LR$$LR_RW_DATA$$Base
85 #define __RW_END__			Load$$LR$$LR_END$$Base
86 #define __SPM_SHIM_EXCEPTIONS_START__	Load$$__SPM_SHIM_EXCEPTIONS__$$Base
87 #define __SPM_SHIM_EXCEPTIONS_END__	Load$$__SPM_SHIM_EXCEPTIONS_EPILOGUE__$$Base
88 #define __STACKS_START__		Load$$__STACKS__$$Base
89 #define __STACKS_END__			Load$$__STACKS__$$Limit
90 #define __TEXT_START__			Load$$__TEXT__$$Base
91 #define __TEXT_END__			Load$$__TEXT_EPILOGUE__$$Base
92 #endif /* USE_ARM_LINK */
93 
94 #ifndef __ASSEMBLER__
95 
96 /*
97  * Declarations of linker defined symbols to help determine memory layout of
98  * BL images
99  */
100 #if SEPARATE_CODE_AND_RODATA
101 IMPORT_SYM(uintptr_t, __TEXT_START__,		BL_CODE_BASE);
102 IMPORT_SYM(uintptr_t, __TEXT_END__,		BL_CODE_END);
103 IMPORT_SYM(uintptr_t, __RODATA_START__,		BL_RO_DATA_BASE);
104 IMPORT_SYM(uintptr_t, __RODATA_END__,		BL_RO_DATA_END);
105 #else
106 IMPORT_SYM(uintptr_t, __RO_START__,		BL_CODE_BASE);
107 IMPORT_SYM(uintptr_t, __RO_END__,		BL_CODE_END);
108 #endif
109 IMPORT_SYM(uintptr_t, __RW_END__,		BL_END);
110 
111 #if defined(IMAGE_BL1)
112 IMPORT_SYM(uintptr_t, __BL1_ROM_END__,		BL1_ROM_END);
113 
114 IMPORT_SYM(uintptr_t, __BL1_RAM_START__,	BL1_RAM_BASE);
115 IMPORT_SYM(uintptr_t, __BL1_RAM_END__,		BL1_RAM_LIMIT);
116 #elif defined(IMAGE_BL2)
117 IMPORT_SYM(uintptr_t, __BL2_END__,		BL2_END);
118 #elif defined(IMAGE_BL2U)
119 IMPORT_SYM(uintptr_t, __BL2U_END__,		BL2U_END);
120 #elif defined(IMAGE_BL31)
121 IMPORT_SYM(uintptr_t, __BL31_START__,		BL31_START);
122 IMPORT_SYM(uintptr_t, __BL31_END__,		BL31_END);
123 #elif defined(IMAGE_BL32)
124 IMPORT_SYM(uintptr_t, __BL32_END__,		BL32_END);
125 #endif /* IMAGE_BLX */
126 
127 /* The following symbols are only exported from the BL2 at EL3 linker script. */
128 #if BL2_IN_XIP_MEM && defined(IMAGE_BL2)
129 IMPORT_SYM(uintptr_t, __BL2_ROM_END__,		BL2_ROM_END);
130 
131 IMPORT_SYM(uintptr_t, __BL2_RAM_START__,	BL2_RAM_BASE);
132 IMPORT_SYM(uintptr_t, __BL2_RAM_END__,		BL2_RAM_END);
133 #endif /* BL2_IN_XIP_MEM */
134 
135 /*
136  * The next 2 constants identify the extents of the coherent memory region.
137  * These addresses are used by the MMU setup code and therefore they must be
138  * page-aligned.  It is the responsibility of the linker script to ensure that
139  * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
140  * page-aligned addresses.
141  */
142 #if USE_COHERENT_MEM
143 IMPORT_SYM(uintptr_t, __COHERENT_RAM_START__,	BL_COHERENT_RAM_BASE);
144 IMPORT_SYM(uintptr_t, __COHERENT_RAM_END__,	BL_COHERENT_RAM_END);
145 #endif
146 
147 /*******************************************************************************
148  * Structure used for telling the next BL how much of a particular type of
149  * memory is available for its use and how much is already used.
150  ******************************************************************************/
151 typedef struct meminfo {
152 	uintptr_t total_base;
153 	size_t total_size;
154 } meminfo_t;
155 
156 /*******************************************************************************
157  * Function & variable prototypes
158  ******************************************************************************/
159 int load_auth_image(unsigned int image_id, image_info_t *image_data);
160 
161 #if TRUSTED_BOARD_BOOT && defined(DYN_DISABLE_AUTH)
162 /*
163  * API to dynamically disable authentication. Only meant for development
164  * systems.
165  */
166 void dyn_disable_auth(void);
167 #endif
168 
169 extern const char build_message[];
170 extern const char version_string[];
171 
172 void print_entry_point_info(const entry_point_info_t *ep_info);
173 uintptr_t page_align(uintptr_t value, unsigned dir);
174 
175 struct mmap_region;
176 
177 void setup_page_tables(const struct mmap_region *bl_regions,
178 			   const struct mmap_region *plat_regions);
179 
180 void bl_handle_pauth(void);
181 
182 #endif /*__ASSEMBLER__*/
183 
184 #endif /* BL_COMMON_H */
185