| /external/llvm-project/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 200 adds r0, r0, #-4096 label
202 adds r0, #-4096 label
272 adds sp, sp, #-4096 label
274 adds sp, #-4096 label
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| D | branch-disassemble.s | 12 adds r0, r1, #42 label
13 adds r1, r2, #42 label
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| /external/llvm-project/llvm/test/MC/AArch64/ |
| D | arm64-optional-hash.s | 9 adds x3, x4, 1024, lsl 12 label
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| D | arm64-diags.s | 342 adds w3, w5, sym@PAGEOFF label
343 adds x9, x12, sym@PAGEOFF label
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-optional-hash.s | 9 adds x3, x4, 1024, lsl 12 label
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| D | arm64-diags.s | 281 adds w3, w5, sym@PAGEOFF label
282 adds x9, x12, sym@PAGEOFF label
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| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 23 adds w13, w23, #291, lsl #12 label
25 adds w20, wsp, #0 label
68 adds w3, w5, w7 label
70 adds w20, wzr, w4 label
71 adds w4, w6, wzr label
72 adds w11, w13, w15 label
73 adds w9, w3, wzr, lsl #10 label
74 adds w17, w29, w20, lsl #31 label
75 adds w21, w22, w23, lsr #0 label
76 adds w24, w25, w26, lsr #18 label
[all …]
|
| /external/tensorflow/tensorflow/lite/delegates/gpu/gl/kernels/ |
| D | add.cc | 41 auto adds = absl::get_if<Tensor<Linear, DataType::FLOAT32>>(&attr.param); in GenerateCode() local
|
| /external/guava/android/guava-tests/test/com/google/common/collect/ |
| D | SimpleAbstractMultisetTest.java | 78 ImmutableMultiset<String> adds = in testFastAddAllMultiset() local
|
| /external/guava/guava-tests/test/com/google/common/collect/ |
| D | SimpleAbstractMultisetTest.java | 78 ImmutableMultiset<String> adds = in testFastAddAllMultiset() local
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| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 407 __ adds(Narrow, r4, r4, 24U); in Generate_2() local
417 __ adds(Narrow, r4, r4, 24U); in Generate_2() local
497 __ adds(r1, r4, 44U); in Generate_3() local
540 __ adds(r0, 4U); in Generate_3() local
541 __ adds(Narrow, r1, r1, 32U); in Generate_3() local
672 __ adds(r0, 4U); in Generate_4() local
673 __ adds(Narrow, r1, r1, 32U); in Generate_4() local
793 __ adds(r0, 4U); in Generate_5() local
794 __ adds(Narrow, r1, r1, 32U); in Generate_5() local
944 __ adds(r0, 4U); in Generate_7() local
[all …]
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 11 adds r0, r1, #1 label
12 adds r0, #42 label
16 adds r0, r1, r2 label
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| D | m4-int.s | 22 adds r0, r1, #1 label
23 adds r0, #42 label
27 adds r0, r1, r2 label
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| /external/Reactive-Extensions/RxCpp/Rx/v2/examples/pythagorian/ |
| D | main.cpp | 87 int adds; member
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| /external/mesa3d/src/intel/compiler/ |
| D | brw_fs_bank_conflicts.cpp | 118 adds(const vector_type &v, const vector_type &w) in adds() function
224 adds(vector_type v, vector_type w) in adds() function
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| /external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_peephole.cpp | 1498 int adds; in opnd() local
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| /external/mdnsresponder/mDNSShared/ |
| D | dnsextd.c | 1519 int i, adds = 0, dels = 0; in HandleRequest() local
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| /external/vixl/test/aarch64/ |
| D | test-assembler-aarch64.cc | 7405 __ adds(xzr, x0, Operand(x1, UXTX)); in TEST() local
7406 __ adds(xzr, x1, Operand(xzr, UXTX)); in TEST() local
7407 __ adds(xzr, x1, 1234); in TEST() local
7408 __ adds(xzr, x0, x1); in TEST() local
7409 __ adds(xzr, x1, xzr); in TEST() local
7410 __ adds(xzr, xzr, x1); in TEST() local
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| D | test-trace-aarch64.cc | 63 __ adds(w21, w22, w23); in GenerateTestSequenceBase() local
64 __ adds(x24, x25, x26); in GenerateTestSequenceBase() local
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 1940 void adds(Register rd, Register rn, const Operand& operand) { in adds() function
1943 void adds(Condition cond, Register rd, Register rn, const Operand& operand) { in adds() function
1946 void adds(EncodingSize size, in adds() function
|
| D | assembler-aarch32.cc | 2348 void Assembler::adds(Condition cond, in adds() function in vixl::aarch32::Assembler
2485 void Assembler::adds(Register rd, const Operand& operand) { in adds() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1175 void Disassembler::adds(Condition cond, in adds() function in vixl::aarch32::Disassembler
1189 void Disassembler::adds(Register rd, const Operand& operand) { in adds() function in vixl::aarch32::Disassembler
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 476 void Assembler::adds(const Register& rd, in adds() function in vixl::aarch64::Assembler
|