| /external/llvm-project/llvm/test/MC/AArch64/SVE/ |
| D | asr.s | 10 asr z0.b, z0.b, #1 label
16 asr z31.b, z31.b, #8 label
22 asr z0.h, z0.h, #1 label
28 asr z31.h, z31.h, #16 label
34 asr z0.s, z0.s, #1 label
40 asr z31.s, z31.s, #32 label
46 asr z0.d, z0.d, #1 label
52 asr z31.d, z31.d, #64 label
58 asr z0.b, p0/m, z0.b, #1 label
64 asr z31.b, p0/m, z31.b, #8 label
[all …]
|
| D | asr-diagnostics.s | 3 asr z30.b, z10.b, #0 label
8 asr z18.b, z27.b, #9 label
13 asr z18.b, p0/m, z28.b, #0 label
18 asr z1.b, p0/m, z9.b, #9 label
23 asr z26.h, z4.h, #0 label
28 asr z25.h, z10.h, #17 label
33 asr z21.h, p0/m, z2.h, #0 label
38 asr z14.h, p0/m, z30.h, #17 label
43 asr z17.s, z0.s, #0 label
48 asr z0.s, z15.s, #33 label
[all …]
|
| D | movprfx-diagnostics.s | 46 asr z2.s, p0/m, z2.s, z0.d label
97 asr z0.s, p0/m, z0.s, z0.d label
147 asr z0.s, p1/m, z0.s, z1.d label
187 asr z0.s, p0/m, z0.s, z1.d label
|
| /external/skia/tools/gpu/ |
| D | TestContext.cpp | 32 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); in makeCurrentAndAutoRestore() local
|
| /external/skqp/tools/gpu/ |
| D | TestContext.cpp | 41 auto asr = SkScopeExit(this->onPlatformGetAutoContextRestore()); in makeCurrentAndAutoRestore() local
|
| /external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| D | A55-basic-instructions.s | 245 asr x3, x4, #63 label
246 asr wzr, wzr, #31 label
264 asr w3, w2, #0 label
265 asr w9, w10, #31 label
266 asr x20, x21, #63 label
267 asr w1, wzr, #3 label
278 asr x19, x20, #0 label
280 asr w9, w10, #0 label
285 asr x2, x3, #63 label
286 asr x19, x20, #0 label
[all …]
|
| /external/vixl/test/aarch64/ |
| D | test-api-movprfx-aarch64.cc | 95 __ asr(z2.VnS(), p2.Merging(), z2.VnS(), z2.VnS()); in TEST() local
98 __ asr(z10.VnH(), p2.Merging(), z10.VnH(), z10.VnD()); in TEST() local
101 __ asr(z17.VnD(), p5.Merging(), z17.VnD(), z17.VnD()); in TEST() local
640 __ asr(z26.VnB(), p5.Merging(), z26.VnB(), 3); in TEST() local
643 __ asr(z25.VnH(), p7.Merging(), z25.VnH(), z14.VnH()); in TEST() local
646 __ asr(z12.VnH(), p7.Merging(), z12.VnH(), z23.VnD()); in TEST() local
649 __ asr(z3.VnD(), p4.Merging(), z3.VnD(), z15.VnD()); in TEST() local
1281 __ asr(z24.VnD(), p5.Merging(), z24.VnD(), 3); in TEST() local
1284 __ asr(z1.VnH(), p3.Merging(), z1.VnH(), z4.VnH()); in TEST() local
1287 __ asr(z0.VnB(), p7.Merging(), z0.VnB(), z28.VnD()); in TEST() local
[all …]
|
| D | test-trace-aarch64.cc | 69 __ asr(w11, w12, 0); in GenerateTestSequenceBase() local
70 __ asr(x13, x14, 1); in GenerateTestSequenceBase() local
|
| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 29 asr, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 29 asr, enumerator
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMAddressingModes.h | 29 asr, enumerator
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 788 void asr(const Register& rd, const Register& rn, unsigned shift) { in asr() function
|
| D | assembler-sve-aarch64.cc | 179 void Assembler::asr(const ZRegister& zd, in asr() function in vixl::aarch64::Assembler
196 void Assembler::asr(const ZRegister& zd, in asr() function in vixl::aarch64::Assembler
392 void Assembler::asr(const ZRegister& zd, const ZRegister& zn, int shift) { in asr() function in vixl::aarch64::Assembler
400 void Assembler::asr(const ZRegister& zd, in asr() function in vixl::aarch64::Assembler
|
| /external/vixl/benchmarks/aarch32/ |
| D | asm-disasm-speed-test.cc | 4796 __ asr(lr, lr, 3U); in Generate_36() local
5296 __ asr(ip, lr, 3U); in Generate_40() local
5391 __ asr(r8, r8, 1U); in Generate_41() local
5509 __ asr(r8, r8, 1U); in Generate_42() local
5555 __ asr(fp, r1, 3U); in Generate_42() local
5561 __ asr(fp, ip, 1U); in Generate_42() local
5876 __ asr(sl, r9, 3U); in Generate_45() local
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 2015 void asr(Register rd, Register rm, const Operand& operand) { in asr() function
2018 void asr(Condition cond, Register rd, Register rm, const Operand& operand) { in asr() function
2021 void asr(EncodingSize size, in asr() function
|
| D | assembler-aarch32.cc | 2871 void Assembler::asr(Condition cond, in asr() function in vixl::aarch32::Assembler
|
| D | disasm-aarch32.cc | 1245 void Disassembler::asr(Condition cond, in asr() function in vixl::aarch32::Disassembler
|
| /external/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 1731 void AssemblerARM32::asr(const Operand *OpRd, const Operand *OpRm, in asr() function in Ice::ARM32::AssemblerARM32
|