/external/arm-trusted-firmware/plat/marvell/armada/a3k/common/ |
D | dram_win.c | 189 uint32_t base_reg, ctrl_reg, size_reg, enabled, target; in dram_win_map_build() local 225 uint32_t base_reg, ctrl_reg, size_reg, remap_reg; in cpu_win_set() local
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/external/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
D | EmulateInstructionARM.cpp | 4534 RegisterInfo base_reg; in EmulateLDRRtRnImm() local 4670 RegisterInfo base_reg; in EmulateSTM() local 4792 RegisterInfo base_reg; in EmulateSTMDA() local 4940 RegisterInfo base_reg; in EmulateSTMDB() local 5063 RegisterInfo base_reg; in EmulateSTMIB() local 5254 RegisterInfo base_reg; in EmulateSTRThumb() local 5460 RegisterInfo base_reg; in EmulateSTRRegister() local 5586 RegisterInfo base_reg; in EmulateSTRBThumb() local 5756 RegisterInfo base_reg; in EmulateSTRHRegister() local 5770 RegisterInfo base_reg; in EmulateSTRHRegister() local [all …]
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/external/llvm-project/lldb/include/lldb/Core/ |
D | EmulateInstruction.h | 194 RegisterInfo base_reg; // base register number member 200 RegisterInfo base_reg; // base register for address calculation member 205 RegisterInfo base_reg; // base register for address calculation member
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/external/capstone/bindings/ocaml/ |
D | m680x.ml | 9 base_reg: int; RecordField
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/external/capstone/bindings/java/capstone/ |
D | M680x.java | 17 public int base_reg; field in M680x.OpIndexed
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/external/llvm-project/lldb/source/Plugins/SymbolFile/NativePDB/ |
D | PdbUtil.cpp | 637 RegisterId base_reg = in GetVariableLocationInfo() local 661 RegisterId base_reg = (RegisterId)(uint16_t)loc.Hdr.Register; in GetVariableLocationInfo() local
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/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_reg_allocate.cpp | 138 for (int base_reg = j; in brw_vec4_alloc_reg_set() local
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D | brw_fs_reg_allocate.cpp | 228 for (int base_reg = j; in brw_alloc_reg_set() local 242 for (int base_reg = j; in brw_alloc_reg_set() local
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/external/mesa3d/src/mesa/drivers/dri/radeon/ |
D | radeon_state_init.c | 426 uint32_t base_reg; in cube_emit_cs() local
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/external/mesa3d/src/util/ |
D | register_allocate.c | 282 unsigned int base_reg, unsigned int reg) in ra_add_transitive_reg_conflict() 301 unsigned int base_reg, unsigned int reg0, unsigned int reg1) in ra_add_transitive_reg_pair_conflict()
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/external/mesa3d/src/amd/vulkan/ |
D | radv_cmd_buffer.c | 710 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_userdata_address() local 940 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_inline_push_consts() local 2847 uint32_t base_reg; in radv_emit_streamout_buffers() local 2951 uint32_t base_reg; in radv_flush_ngg_gs_state() local 5047 uint32_t base_reg = pipeline->user_data_0[stage]; in radv_emit_view_index() local 5054 uint32_t base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0; in radv_emit_view_index() local 5095 uint32_t base_reg = cmd_buffer->state.pipeline->graphics.vtx_base_sgpr; in radv_cs_emit_indirect_draw_packet() local
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/external/capstone/include/capstone/ |
D | m680x.h | 82 m680x_reg base_reg; ///< base register (or M680X_REG_INVALID if member
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D | m68k.h | 127 m68k_reg base_reg; ///< base register (or M68K_REG_INVALID if irrelevant) member
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/external/capstone/arch/M680X/ |
D | M680XDisassembler.c | 1198 static void add_indexed_operand(m680x_info *info, m680x_reg base_reg, in add_indexed_operand()
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/external/pcre/dist2/src/sljit/ |
D | sljitNativeARM_32.c | 1001 #define EMIT_DATA_TRANSFER(type, add, target_reg, base_reg, arg) \ argument
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/external/mesa3d/src/freedreno/decode/ |
D | cffdec.c | 1441 const unsigned base_reg = in cp_load_state() local
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/external/pcre/dist2/src/ |
D | pcre2_jit_compile.c | 2554 int from_sp, base_reg, offset, i; in copy_recurse_data() local
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