1 /* 2 * Copyright (C) 2020 Collabora Ltd. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors (Collabora): 24 * Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> 25 */ 26 27 #include "compiler.h" 28 29 unsigned bi_class_props[BI_NUM_CLASSES] = { 30 [BI_ADD] = BI_MODS | BI_SCHED_ALL | BI_NO_ABS_ABS_FP16_FMA, 31 [BI_ATEST] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD, 32 [BI_BRANCH] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_CONDITIONAL, 33 [BI_CMP] = BI_MODS | BI_SCHED_ALL | BI_CONDITIONAL, 34 [BI_BLEND] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_SRC, 35 [BI_BITWISE] = BI_SCHED_ALL, 36 [BI_COMBINE] = 0, 37 [BI_CONVERT] = BI_SCHED_ADD | BI_SWIZZLABLE | BI_ROUNDMODE, /* +FMA on G71 */ 38 [BI_CSEL] = BI_SCHED_FMA | BI_CONDITIONAL, 39 [BI_DISCARD] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_CONDITIONAL, 40 [BI_FMA] = BI_ROUNDMODE | BI_SCHED_FMA | BI_MODS, 41 [BI_FREXP] = BI_SCHED_ALL, 42 [BI_IMATH] = BI_SCHED_ALL, 43 [BI_LOAD] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 44 [BI_LOAD_UNIFORM] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 45 [BI_LOAD_ATTR] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 46 [BI_LOAD_VAR] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 47 [BI_LOAD_VAR_ADDRESS] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 48 [BI_LOAD_TILE] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 49 [BI_MINMAX] = BI_SCHED_ADD | BI_NO_ABS_ABS_FP16_FMA | BI_MODS, 50 [BI_MOV] = BI_SCHED_ALL, 51 [BI_FMOV] = BI_MODS | BI_SCHED_ALL, 52 [BI_REDUCE_FMA] = BI_SCHED_FMA, 53 [BI_STORE] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_SRC, 54 [BI_STORE_VAR] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_SRC, 55 [BI_SPECIAL_ADD] = BI_SCHED_ADD | BI_SCHED_SLOW, 56 [BI_SPECIAL_FMA] = BI_SCHED_FMA | BI_SCHED_SLOW, 57 [BI_TABLE] = BI_SCHED_ADD, 58 [BI_SELECT] = BI_SCHED_ALL | BI_SWIZZLABLE, 59 [BI_TEXS] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 60 [BI_TEXC] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_SRC | BI_DATA_REG_DEST, 61 [BI_TEXC_DUAL] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_VECTOR | BI_DATA_REG_DEST, 62 [BI_ROUND] = BI_ROUNDMODE | BI_SCHED_ALL, 63 [BI_IMUL] = BI_SCHED_FMA, 64 [BI_ZS_EMIT] = BI_SCHED_HI_LATENCY | BI_SCHED_ADD | BI_DATA_REG_DEST, 65 }; 66