1 /*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD5_CONTEXT_H_
28 #define FD5_CONTEXT_H_
29
30 #include "util/u_upload_mgr.h"
31
32 #include "freedreno_context.h"
33
34 #include "ir3/ir3_shader.h"
35
36 struct fd5_context {
37 struct fd_context base;
38
39 /* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes). We
40 * could combine it with another allocation.
41 */
42 struct fd_bo *vsc_size_mem;
43
44 /* TODO not sure what this is for.. probably similar to
45 * CACHE_FLUSH_TS on kernel side, where value gets written
46 * to this address synchronized w/ 3d (ie. a way to
47 * synchronize when the CP is running far ahead)
48 */
49 struct fd_bo *blit_mem;
50
51 struct u_upload_mgr *border_color_uploader;
52 struct pipe_resource *border_color_buf;
53
54 /* if *any* of bits are set in {v,f}saturate_{s,t,r} */
55 bool vsaturate, fsaturate;
56
57 /* bitmask of sampler which needs coords clamped for vertex
58 * shader:
59 */
60 uint16_t vsaturate_s, vsaturate_t, vsaturate_r;
61
62 /* bitmask of sampler which needs coords clamped for frag
63 * shader:
64 */
65 uint16_t fsaturate_s, fsaturate_t, fsaturate_r;
66
67 /* bitmask of samplers which need astc srgb workaround: */
68 uint16_t vastc_srgb, fastc_srgb;
69
70 /* some state changes require a different shader variant. Keep
71 * track of this so we know when we need to re-emit shader state
72 * due to variant change. See fixup_shader_state()
73 */
74 struct ir3_shader_key last_key;
75
76 /* number of active samples-passed queries: */
77 int samples_passed_queries;
78
79 /* cached state about current emitted shader program (3d): */
80 unsigned max_loc;
81 };
82
83 static inline struct fd5_context *
fd5_context(struct fd_context * ctx)84 fd5_context(struct fd_context *ctx)
85 {
86 return (struct fd5_context *)ctx;
87 }
88
89 struct pipe_context *
90 fd5_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
91
92 /* helper for places where we need to stall CP to wait for previous draws: */
93 static inline void
fd5_emit_flush(struct fd_context * ctx,struct fd_ringbuffer * ring)94 fd5_emit_flush(struct fd_context *ctx, struct fd_ringbuffer *ring)
95 {
96 OUT_PKT7(ring, CP_EVENT_WRITE, 4);
97 OUT_RING(ring, CACHE_FLUSH_TS);
98 OUT_RELOC(ring, fd5_context(ctx)->blit_mem, 0, 0, 0); /* ADDR_LO/HI */
99 OUT_RING(ring, 0x00000000);
100
101 OUT_WFI5(ring);
102 }
103
104 #endif /* FD5_CONTEXT_H_ */
105