1 /******************************************************************************
2 * *
3 * Copyright (C) 2018 The Android Open Source Project
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************
18 * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #include <stdlib.h>
21 #include <stdio.h>
22 #include <math.h>
23
24 #include <assert.h>
25 #include <string.h>
26
27 #include "ixheaacd_type_def.h"
28
29 #include "ixheaacd_bitbuffer.h"
30
31 #include "ixheaacd_defines.h"
32 #include "ixheaacd_memory_standards.h"
33 #include "ixheaacd_sbrdecsettings.h"
34 #include "ixheaacd_env_extr_part.h"
35 #include "ixheaacd_aac_rom.h"
36 #include "ixheaacd_common_rom.h"
37 #include "ixheaacd_sbr_rom.h"
38 #include "ixheaacd_pulsedata.h"
39 #include "ixheaacd_pns.h"
40
41 #include "ixheaacd_sbr_common.h"
42 #include "ixheaacd_drc_data_struct.h"
43 #include "ixheaacd_drc_dec.h"
44
45 #include "ixheaacd_lt_predict.h"
46 #include "ixheaacd_channelinfo.h"
47 #include "ixheaacd_channel.h"
48 #include "ixheaacd_channelinfo.h"
49 #include "ixheaacd_sbrdecoder.h"
50 #include "ixheaacd_audioobjtypes.h"
51 #include "ixheaacd_latmdemux.h"
52 #include "ixheaacd_aacdec.h"
53 #include "ixheaacd_sbr_common.h"
54
55 #include "ixheaacd_mps_polyphase.h"
56 #include "ixheaacd_config.h"
57 #include "ixheaacd_mps_dec.h"
58 #include "ixheaacd_mps_interface.h"
59 #include "ixheaacd_struct_def.h"
60
61 #include "ixheaacd_config.h"
62 #include "ixheaacd_mps_interface.h"
63
64 #include "ixheaacd_mps_polyphase.h"
65
66 #include "ixheaacd_mps_dec.h"
67 #include "ixheaacd_mps_process.h"
68 #include "ixheaacd_mps_decor.h"
69 #include "ixheaacd_mps_hybfilter.h"
70 #include "ixheaacd_mps_nlc_dec.h"
71 #include "ixheaacd_mps_huff_tab.h"
72 #include "ixheaacd_error_standards.h"
73
74 extern const ia_huff_pt0_nodes_struct ixheaacd_huff_part0_nodes;
75 extern const ia_huff_ipd_nodes_struct ixheaacd_huff_ipd_nodes;
76 extern const ia_huff_lav_nodes_struct ixheaacd_huff_lav_idx_nodes;
77 extern const ia_huff_pt0_nodes_struct ixheaacd_huff_pilot_nodes;
78 extern const ia_huff_cld_nodes_struct ixheaacd_huff_cld_nodes;
79 extern const ia_huff_icc_nodes_struct ixheaacd_huff_icc_nodes;
80 extern const ia_huff_res_nodes_struct ixheaacd_huff_reshape_nodes;
81
ixheaacd_mps_create(ia_mps_dec_state_struct * self,WORD32 bs_frame_len,WORD32 residual_coding,ia_usac_dec_mps_config_struct * mps212_config)82 WORD32 ixheaacd_mps_create(ia_mps_dec_state_struct* self, WORD32 bs_frame_len,
83 WORD32 residual_coding,
84 ia_usac_dec_mps_config_struct* mps212_config) {
85 WORD32 num_ch;
86 WORD32 err_code = 0;
87
88 ia_mps_bs_frame bs_frame;
89
90 self->num_parameter_sets = 1;
91 self->qmf_band_count = 64;
92
93 self->res_ch_count = 0;
94
95 if (mps212_config) {
96 self->config = mps212_config;
97 self->frame_length = bs_frame_len;
98 self->in_ch_count = 1;
99 self->out_ch_count = 2;
100 self->residual_coding = residual_coding;
101 if (self->residual_coding) {
102 self->bs_residual_present = 1;
103 self->bs_residual_bands = mps212_config->bs_residual_bands;
104 if (self->config->bs_phase_coding) {
105 self->config->bs_phase_coding = 2;
106 }
107 }
108 }
109
110 err_code = ixheaacd_mps_header_decode(self);
111
112 if (err_code != 0) return err_code;
113
114 if ((self->residual_coding) && (self->res_bands > 0)) self->res_ch_count++;
115
116 ixheaacd_mps_env_init(self);
117
118 ixheaacd_mps_synt_create(&self->poly_phase_filt_kernel, self->qmf_band_count);
119
120 for (num_ch = 0; num_ch < self->out_ch_count; num_ch++) {
121 ixheaacd_mps_synt_init(&self->qmf_filt_state[num_ch]);
122 }
123
124 ixheaacd_mps_qmf_hybrid_analysis_init(&self->hyb_filt_state[0]);
125
126 if ((self->residual_coding) && (self->res_bands > 0))
127 ixheaacd_mps_qmf_hybrid_analysis_init(&self->hyb_filt_state[1]);
128
129 err_code = ixheaacd_mps_decor_init(&(self->mps_decor), self->hyb_band_count,
130 self->config->bs_decorr_config);
131 if (err_code != IA_NO_ERROR) return err_code;
132
133 ixheaacd_mps_init_pre_and_post_matrix(self);
134
135 self->parse_nxt_frame = 1;
136
137 bs_frame = self->bs_frame;
138 memset(bs_frame.cld_idx_pre, 0, MAX_PARAMETER_BANDS * sizeof(WORD32));
139 memset(bs_frame.icc_idx_pre, 0, MAX_PARAMETER_BANDS * sizeof(WORD32));
140 memset(bs_frame.cmp_cld_idx_prev, 0, MAX_PARAMETER_BANDS * sizeof(WORD32));
141 memset(bs_frame.cmp_icc_idx_prev, 0, MAX_PARAMETER_BANDS * sizeof(WORD32));
142
143 self->subband_var.init_flag = 0;
144 self->subband_var.update_old_ener = 0;
145 self->subband_var.nrg_dir = 0;
146 memset(self->subband_var.nrg_diff, 0, 2 * sizeof(FLOAT32));
147
148 memset(self->opd_smooth.smooth_l_phase, 0,
149 MAX_PARAMETER_BANDS * sizeof(WORD32));
150 memset(self->opd_smooth.smooth_r_phase, 0,
151 MAX_PARAMETER_BANDS * sizeof(WORD32));
152
153 return 0;
154 }
155
156 static const FLOAT32 ixheaacd_tsd_mul_re[] = {
157 1.0f, 0.707106781186548f, 0.0f, -0.707106781186548f,
158 -1.0f, -0.707106781186548f, 0.0f, 0.707106781186548f};
159
160 static const FLOAT32 ixheaacd_tsd_mul_im[] = {
161 0.0f, 0.707106781186548f, 1.0f, 0.707106781186548f,
162 0.0f, -0.707106781186548f, -1.0f, -0.707106781186548f};
163
ixheaacd_mps_qmf_hyb_analysis(ia_mps_dec_state_struct * self)164 VOID ixheaacd_mps_qmf_hyb_analysis(ia_mps_dec_state_struct* self) {
165 ixheaacd_mps_qmf_hybrid_analysis(&self->hyb_filt_state[0], self->qmf_in[0],
166 self->qmf_band_count, self->time_slots,
167 self->hyb_in[0]);
168
169 if ((self->residual_coding) && (self->res_bands > 0)) {
170 ixheaacd_mps_qmf_hybrid_analysis(&self->hyb_filt_state[self->in_ch_count],
171 self->qmf_in[1], self->qmf_band_count,
172 self->time_slots, self->hyb_res);
173 }
174 }
175
ixheaacd_mps_qmf_hyb_synthesis(ia_mps_dec_state_struct * self)176 VOID ixheaacd_mps_qmf_hyb_synthesis(ia_mps_dec_state_struct* self) {
177 WORD32 ch;
178
179 for (ch = 0; ch < self->out_ch_count; ch++) {
180 ixheaacd_mps_qmf_hybrid_synthesis(self->hyb_dir_out[ch],
181 self->qmf_band_count, self->time_slots,
182 self->qmf_out_dir[ch]);
183 }
184 }
185
ixheaacd_mps_decor(ia_mps_dec_state_struct * self)186 VOID ixheaacd_mps_decor(ia_mps_dec_state_struct* self) {
187 WORD32 k, sb_sample, idx;
188
189 ia_cmplx_flt_struct(*scratch)[MAX_HYBRID_BANDS_MPS];
190
191 ia_cmplx_flt_struct coeff;
192 WORD32 band_start = 7;
193
194 scratch = self->scratch;
195
196 for (k = self->dir_sig_count; k < self->dir_sig_count + self->decor_sig_count;
197 k++) {
198 if (self->bs_tsd_enable) {
199 for (sb_sample = 0; sb_sample < self->time_slots; sb_sample++) {
200 if (self->bs_tsd_sep_data[sb_sample]) {
201 for (idx = band_start; idx < self->mps_decor.num_bins; idx++) {
202 scratch[sb_sample][idx].re = self->v[k][sb_sample][idx].re;
203 scratch[sb_sample][idx].im = self->v[k][sb_sample][idx].im;
204 self->v[k][sb_sample][idx].re = 0.0f;
205 self->v[k][sb_sample][idx].im = 0.0f;
206 }
207 }
208 }
209 }
210
211 ixheaacd_mps_decor_apply(&self->mps_decor, self->v[k], self->w_diff[k],
212 self->time_slots);
213
214 if (self->bs_tsd_enable) {
215 for (sb_sample = 0; sb_sample < self->time_slots; sb_sample++) {
216 if (self->bs_tsd_sep_data[sb_sample]) {
217 coeff.re = ixheaacd_tsd_mul_re[self->bs_tsd_tr_phase_data[sb_sample]];
218 coeff.im = ixheaacd_tsd_mul_im[self->bs_tsd_tr_phase_data[sb_sample]];
219
220 for (idx = band_start; idx < self->mps_decor.num_bins; idx++) {
221 self->w_diff[k][sb_sample][idx].re +=
222 coeff.re * scratch[sb_sample][idx].re -
223 coeff.im * scratch[sb_sample][idx].im;
224 self->w_diff[k][sb_sample][idx].im +=
225 coeff.im * scratch[sb_sample][idx].re +
226 coeff.re * scratch[sb_sample][idx].im;
227 }
228 }
229 }
230 }
231 }
232 }
233
ixheaacd_mps_mix_res_decor(ia_mps_dec_state_struct * self)234 VOID ixheaacd_mps_mix_res_decor(ia_mps_dec_state_struct* self) {
235 WORD32 ts, qs, row, indx;
236
237 for (ts = 0; ts < self->time_slots; ts++) {
238 for (qs = 0; qs < self->hyb_band_count; qs++) {
239 indx = self->hyb_band_to_processing_band_table[qs];
240
241 for (row = 0; row < self->dir_sig_count; row++) {
242 self->w_dir[row][ts][qs].re = self->v[row][ts][qs].re;
243 self->w_dir[row][ts][qs].im = self->v[row][ts][qs].im;
244 }
245
246 for (row = self->dir_sig_count;
247 row < (self->dir_sig_count + self->decor_sig_count); row++) {
248 if (indx < self->res_bands) {
249 self->w_dir[row][ts][qs].re = self->hyb_res[ts][qs].re;
250 self->w_dir[row][ts][qs].im = self->hyb_res[ts][qs].im;
251 } else {
252 self->w_dir[row][ts][qs].re = 0.0f;
253 self->w_dir[row][ts][qs].im = 0.0f;
254 }
255 }
256
257 for (row = 0; row < self->dir_sig_count; row++) {
258 self->w_diff[row][ts][qs].re = 0.0f;
259 self->w_diff[row][ts][qs].im = 0.0f;
260 }
261
262 for (row = self->dir_sig_count;
263 row < (self->dir_sig_count + self->decor_sig_count); row++) {
264 if (indx < self->res_bands) {
265 self->w_diff[row][ts][qs].re = 0.0f;
266 self->w_diff[row][ts][qs].im = 0.0f;
267 }
268 }
269 }
270 }
271 }
272
ixheaacd_mps_create_w(ia_mps_dec_state_struct * self)273 VOID ixheaacd_mps_create_w(ia_mps_dec_state_struct* self) {
274 ixheaacd_mps_decor(self);
275 ixheaacd_mps_mix_res_decor(self);
276 }
ixheaacd_mps_apply(ia_mps_dec_state_struct * self,FLOAT32 ** input_buffer[4],FLOAT32 (* output_buffer)[4096])277 WORD32 ixheaacd_mps_apply(ia_mps_dec_state_struct* self,
278 FLOAT32** input_buffer[4],
279 FLOAT32 (*output_buffer)[4096]) {
280 WORD32 ch, ts, qs;
281 WORD32 time_slots = self->time_slots;
282 WORD32 in_ch_count = self->in_ch_count + self->res_ch_count;
283 WORD32 err = 0;
284
285 self->output_buffer = output_buffer;
286
287 assert(self->present_time_slot + time_slots <= self->time_slots);
288
289 for (ts = 0; ts < time_slots; ts++) {
290 for (ch = 0; ch < in_ch_count; ch++) {
291 for (qs = 0; qs < self->qmf_band_count; qs++) {
292 self->qmf_in[ch][self->present_time_slot + ts][qs].re =
293 self->input_gain * input_buffer[2 * ch][ts][qs];
294 self->qmf_in[ch][self->present_time_slot + ts][qs].im =
295 self->input_gain * input_buffer[2 * ch + 1][ts][qs];
296 }
297 }
298 }
299
300 self->present_time_slot += time_slots;
301
302 if (self->present_time_slot < self->time_slots) return 0;
303
304 self->present_time_slot = 0;
305
306 err = ixheaacd_mps_frame_decode(self);
307
308 if (err != 0) return err;
309 ixheaacd_mps_qmf_hyb_analysis(self);
310
311 ixheaacd_pre_and_mix_matrix_calculation(self);
312
313 ixheaacd_mps_pre_matrix_mix_matrix_smoothing(self);
314
315 err = ixheaacd_mps_apply_pre_matrix(self);
316 if (err < 0) return err;
317
318 ixheaacd_mps_create_w(self);
319
320 err = ixheaacd_mps_apply_mix_matrix(self);
321 if (err < 0) return err;
322
323 if (self->config->bs_temp_shape_config == 2) {
324 ixheaacd_mps_time_env_shaping(self);
325 }
326
327 err = ixheaacd_mps_temp_process(self);
328 if (err) return err;
329
330 self->parse_nxt_frame = 1;
331 return 0;
332 }
333
334 #define min(a, b) (((a) < (b)) ? (a) : (b))
335
ixheaacd_mps_pcm_decode(ia_handle_bit_buf_struct it_bit_buff,WORD32 * out_data_1,WORD32 * out_data_2,WORD32 ixheaacd_drc_offset,WORD32 num_val,WORD32 num_levels)336 static VOID ixheaacd_mps_pcm_decode(ia_handle_bit_buf_struct it_bit_buff,
337 WORD32* out_data_1, WORD32* out_data_2,
338 WORD32 ixheaacd_drc_offset, WORD32 num_val,
339 WORD32 num_levels) {
340 WORD32 i = 0, j = 0, idx = 0;
341 WORD32 max_grp_len = 0, grp_len = 0, next_val = 0, grp_val = 0;
342 UWORD32 data = 0;
343
344 FLOAT32 ld_nlev = 0.f;
345
346 WORD32 pcm_chunk_size[7] = {0};
347
348 switch (num_levels) {
349 case 3:
350 max_grp_len = 5;
351 break;
352 case 7:
353 max_grp_len = 6;
354 break;
355 case 11:
356 max_grp_len = 2;
357 break;
358 case 13:
359 max_grp_len = 4;
360 break;
361 case 19:
362 max_grp_len = 4;
363 break;
364 case 25:
365 max_grp_len = 3;
366 break;
367 case 51:
368 max_grp_len = 4;
369 break;
370 case 4:
371 case 8:
372 case 15:
373 case 16:
374 case 26:
375 case 31:
376 max_grp_len = 1;
377 break;
378 default:
379 assert(0);
380 }
381
382 ld_nlev = (FLOAT32)(log((FLOAT32)num_levels) / log(2.f));
383
384 for (i = 1; i <= max_grp_len; i++) {
385 pcm_chunk_size[i] = (WORD32)ceil((FLOAT32)(i)*ld_nlev);
386 }
387
388 for (i = 0; i < num_val; i += max_grp_len) {
389 grp_len = min(max_grp_len, num_val - i);
390 data = ixheaacd_read_bits_buf(it_bit_buff, pcm_chunk_size[grp_len]);
391
392 grp_val = data;
393
394 for (j = 0; j < grp_len; j++) {
395 idx = i + (grp_len - j - 1);
396 next_val = grp_val % num_levels;
397
398 if (out_data_2 == NULL) {
399 out_data_1[idx] = next_val - ixheaacd_drc_offset;
400 } else if (out_data_1 == NULL) {
401 out_data_2[idx] = next_val - ixheaacd_drc_offset;
402 } else {
403 if (idx % 2) {
404 out_data_2[idx / 2] = next_val - ixheaacd_drc_offset;
405 } else {
406 out_data_1[idx / 2] = next_val - ixheaacd_drc_offset;
407 }
408 }
409
410 grp_val = (grp_val - next_val) / num_levels;
411 }
412 }
413
414 return;
415 }
416
ixheaacd_mps_huff_read(ia_handle_bit_buf_struct it_bit_buff,const WORD32 (* node_tab)[][2],WORD32 * out_data)417 static VOID ixheaacd_mps_huff_read(ia_handle_bit_buf_struct it_bit_buff,
418 const WORD32 (*node_tab)[][2],
419 WORD32* out_data) {
420 WORD32 node = 0;
421 UWORD32 next_bit = 0;
422
423 do {
424 next_bit = ixheaacd_read_bits_buf(it_bit_buff, 1);
425 node = (*node_tab)[node][next_bit];
426 } while (node > 0);
427
428 *out_data = node;
429
430 return;
431 }
432
ixheaacd_mps_huff_read_2d(ia_handle_bit_buf_struct it_bit_buff,const WORD32 (* node_tab)[][2],WORD32 out_data[2],WORD32 * escape)433 static VOID ixheaacd_mps_huff_read_2d(ia_handle_bit_buf_struct it_bit_buff,
434 const WORD32 (*node_tab)[][2],
435 WORD32 out_data[2], WORD32* escape)
436
437 {
438 WORD32 huff_2d_8bit = 0;
439 WORD32 node = 0;
440
441 ixheaacd_mps_huff_read(it_bit_buff, node_tab, &node);
442 *escape = (node == 0);
443
444 if (*escape) {
445 out_data[0] = 0;
446 out_data[1] = 1;
447 } else {
448 huff_2d_8bit = -(node + 1);
449 out_data[0] = huff_2d_8bit >> 4;
450 out_data[1] = huff_2d_8bit & 0xf;
451 }
452
453 return;
454 }
455
ixheaacd_mps_sym_restore(ia_handle_bit_buf_struct it_bit_buff,WORD32 lav,WORD32 data[2])456 static VOID ixheaacd_mps_sym_restore(ia_handle_bit_buf_struct it_bit_buff,
457 WORD32 lav, WORD32 data[2]) {
458 WORD32 tmp = 0;
459 UWORD32 sym_bit = 0;
460
461 WORD32 sum_val = data[0] + data[1];
462 WORD32 diff_val = data[0] - data[1];
463
464 if (sum_val > lav) {
465 data[0] = -sum_val + (2 * lav + 1);
466 data[1] = -diff_val;
467 } else {
468 data[0] = sum_val;
469 data[1] = diff_val;
470 }
471
472 if (data[0] + data[1] != 0) {
473 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1);
474 if (sym_bit) {
475 data[0] = -data[0];
476 data[1] = -data[1];
477 }
478 }
479
480 if (data[0] - data[1] != 0) {
481 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1);
482 if (sym_bit) {
483 tmp = data[0];
484 data[0] = data[1];
485 data[1] = tmp;
486 }
487 }
488
489 return;
490 }
491
ixheaacd_mps_sym_restoreipd(ia_handle_bit_buf_struct it_bit_buff,WORD32 lav,WORD32 data[2])492 static VOID ixheaacd_mps_sym_restoreipd(ia_handle_bit_buf_struct it_bit_buff,
493 WORD32 lav, WORD32 data[2]) {
494 WORD32 tmp = 0;
495 UWORD32 sym_bit = 0;
496
497 WORD32 sum_val = data[0] + data[1];
498 WORD32 diff_val = data[0] - data[1];
499
500 if (sum_val > lav) {
501 data[0] = -sum_val + (2 * lav + 1);
502 data[1] = -diff_val;
503 } else {
504 data[0] = sum_val;
505 data[1] = diff_val;
506 }
507
508 if (data[0] - data[1] != 0) {
509 sym_bit = ixheaacd_read_bits_buf(it_bit_buff, 1);
510 if (sym_bit) {
511 tmp = data[0];
512 data[0] = data[1];
513 data[1] = tmp;
514 }
515 }
516
517 return;
518 }
519
ixheaacd_mps_huff_dec_pilot(ia_handle_bit_buf_struct it_bit_buff,const WORD32 (* node_tab)[][2],WORD32 * pilot_data)520 static VOID ixheaacd_mps_huff_dec_pilot(ia_handle_bit_buf_struct it_bit_buff,
521 const WORD32 (*node_tab)[][2],
522 WORD32* pilot_data) {
523 WORD32 node = 0;
524
525 ixheaacd_mps_huff_read(it_bit_buff, node_tab, &node);
526 *pilot_data = -(node + 1);
527
528 return;
529 }
530
ixheaacd_mps_huff_dec_cld_1d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_cld_node_1d_struct * huff_nodes,WORD32 * out_data,WORD32 num_val,WORD32 p0_flag)531 static VOID ixheaacd_mps_huff_dec_cld_1d(
532 ia_handle_bit_buf_struct it_bit_buff,
533 const ia_huff_cld_node_1d_struct* huff_nodes, WORD32* out_data,
534 WORD32 num_val, WORD32 p0_flag) {
535 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0;
536 WORD32 od = 0, od_sign = 0;
537 UWORD32 data = 0;
538
539 if (p0_flag) {
540 ixheaacd_mps_huff_read(it_bit_buff,
541 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld,
542 &node);
543 out_data[0] = -(node + 1);
544 ixheaacd_drc_offset = 1;
545 }
546
547 for (i = ixheaacd_drc_offset; i < num_val; i++) {
548 ixheaacd_mps_huff_read(it_bit_buff,
549 (ia_huff_node_struct)&huff_nodes->node_tab, &node);
550 od = -(node + 1);
551
552 if (od != 0) {
553 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
554 od_sign = data;
555
556 if (od_sign) od = -od;
557 }
558
559 out_data[i] = od;
560 }
561
562 return;
563 }
564
ixheaacd_mps_huff_dec_ipd_1d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_ipd_node_1d_struct * huff_nodes,WORD32 * out_data,WORD32 num_val,WORD32 p0_flag)565 static VOID ixheaacd_mps_huff_dec_ipd_1d(
566 ia_handle_bit_buf_struct it_bit_buff,
567 const ia_huff_ipd_node_1d_struct* huff_nodes, WORD32* out_data,
568 WORD32 num_val, WORD32 p0_flag) {
569 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0;
570 WORD32 od = 0;
571
572 if (p0_flag) {
573 ixheaacd_mps_huff_read(
574 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab,
575 &node);
576 out_data[0] = -(node + 1);
577 ixheaacd_drc_offset = 1;
578 }
579
580 for (i = ixheaacd_drc_offset; i < num_val; i++) {
581 ixheaacd_mps_huff_read(it_bit_buff,
582 (ia_huff_node_struct)&huff_nodes->node_tab, &node);
583 od = -(node + 1);
584 out_data[i] = od;
585 }
586
587 return;
588 }
589
ixheaacd_mps_huff_dec_icc_1d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_icc_node_1d_struct * huff_nodes,WORD32 * out_data,WORD32 num_val,WORD32 p0_flag)590 static VOID ixheaacd_mps_huff_dec_icc_1d(
591 ia_handle_bit_buf_struct it_bit_buff,
592 const ia_huff_icc_node_1d_struct* huff_nodes, WORD32* out_data,
593 WORD32 num_val, WORD32 p0_flag) {
594 WORD32 i = 0, node = 0, ixheaacd_drc_offset = 0;
595 WORD32 od = 0, od_sign = 0;
596 UWORD32 data = 0;
597
598 if (p0_flag) {
599 ixheaacd_mps_huff_read(it_bit_buff,
600 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc,
601 &node);
602 out_data[0] = -(node + 1);
603 ixheaacd_drc_offset = 1;
604 }
605
606 for (i = ixheaacd_drc_offset; i < num_val; i++) {
607 ixheaacd_mps_huff_read(it_bit_buff,
608 (ia_huff_node_struct)&huff_nodes->node_tab, &node);
609 od = -(node + 1);
610
611 if (od != 0) {
612 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
613 od_sign = data;
614
615 if (od_sign) od = -od;
616 }
617
618 out_data[i] = od;
619 }
620
621 return;
622 }
623
ixheaacd_mps_huff_dec_cld_2d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_cld_node_2d_struct * huff_nodes,WORD32 out_data[][2],WORD32 num_val,WORD32 ch_fac,WORD32 * p0_data[2])624 static VOID ixheaacd_mps_huff_dec_cld_2d(
625 ia_handle_bit_buf_struct it_bit_buff,
626 const ia_huff_cld_node_2d_struct* huff_nodes, WORD32 out_data[][2],
627 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) {
628 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0;
629 WORD32 node = 0;
630 UWORD32 data = 0;
631
632 WORD32 esc_data[MAXBANDS][2] = {{0}};
633 WORD32 esc_idx[MAXBANDS] = {0};
634
635 ixheaacd_mps_huff_read(
636 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab,
637 &node);
638 data = -(node + 1);
639
640 lav = 2 * data + 3;
641
642 if (p0_data[0] != NULL) {
643 ixheaacd_mps_huff_read(it_bit_buff,
644 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld,
645 &node);
646 *p0_data[0] = -(node + 1);
647 }
648 if (p0_data[1] != NULL) {
649 ixheaacd_mps_huff_read(it_bit_buff,
650 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.cld,
651 &node);
652 *p0_data[1] = -(node + 1);
653 }
654
655 for (i = 0; i < num_val; i += ch_fac) {
656 switch (lav) {
657 case 3:
658 ixheaacd_mps_huff_read_2d(it_bit_buff,
659 (ia_huff_node_struct)&huff_nodes->lav3,
660 out_data[i], &escape);
661 break;
662 case 5:
663 ixheaacd_mps_huff_read_2d(it_bit_buff,
664 (ia_huff_node_struct)&huff_nodes->lav5,
665 out_data[i], &escape);
666 break;
667 case 7:
668 ixheaacd_mps_huff_read_2d(it_bit_buff,
669 (ia_huff_node_struct)&huff_nodes->lav7,
670 out_data[i], &escape);
671 break;
672 case 9:
673 ixheaacd_mps_huff_read_2d(it_bit_buff,
674 (ia_huff_node_struct)&huff_nodes->lav9,
675 out_data[i], &escape);
676 break;
677 default:
678 break;
679 }
680
681 if (escape) {
682 esc_idx[esc_contrl++] = i;
683 } else {
684 ixheaacd_mps_sym_restore(it_bit_buff, lav, out_data[i]);
685 }
686 }
687
688 if (esc_contrl > 0) {
689 ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0,
690 2 * esc_contrl, (2 * lav + 1));
691
692 for (i = 0; i < esc_contrl; i++) {
693 out_data[esc_idx[i]][0] = esc_data[0][i] - lav;
694 out_data[esc_idx[i]][1] = esc_data[1][i] - lav;
695 }
696 }
697
698 return;
699 }
700
ixheaacd_mps_huff_dec_icc_2d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_icc_node_2d_struct * huff_nodes,WORD32 out_data[][2],WORD32 num_val,WORD32 ch_fac,WORD32 * p0_data[2])701 static VOID ixheaacd_mps_huff_dec_icc_2d(
702 ia_handle_bit_buf_struct it_bit_buff,
703 const ia_huff_icc_node_2d_struct* huff_nodes, WORD32 out_data[][2],
704 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) {
705 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0;
706 WORD32 node = 0;
707 UWORD32 data = 0;
708
709 WORD32 esc_data[2][MAXBANDS] = {{0}};
710 WORD32 esc_idx[MAXBANDS] = {0};
711
712 ixheaacd_mps_huff_read(
713 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab,
714 &node);
715 data = -(node + 1);
716
717 lav = 2 * data + 1;
718
719 if (p0_data[0] != NULL) {
720 ixheaacd_mps_huff_read(it_bit_buff,
721 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc,
722 &node);
723 *p0_data[0] = -(node + 1);
724 }
725 if (p0_data[1] != NULL) {
726 ixheaacd_mps_huff_read(it_bit_buff,
727 (ia_huff_node_struct)&ixheaacd_huff_part0_nodes.icc,
728 &node);
729 *p0_data[1] = -(node + 1);
730 }
731
732 for (i = 0; i < num_val; i += ch_fac) {
733 switch (lav) {
734 case 1:
735 ixheaacd_mps_huff_read_2d(it_bit_buff,
736 (ia_huff_node_struct)&huff_nodes->lav1,
737 out_data[i], &escape);
738 break;
739 case 3:
740 ixheaacd_mps_huff_read_2d(it_bit_buff,
741 (ia_huff_node_struct)&huff_nodes->lav3,
742 out_data[i], &escape);
743 break;
744 case 5:
745 ixheaacd_mps_huff_read_2d(it_bit_buff,
746 (ia_huff_node_struct)&huff_nodes->lav5,
747 out_data[i], &escape);
748 break;
749 case 7:
750 ixheaacd_mps_huff_read_2d(it_bit_buff,
751 (ia_huff_node_struct)&huff_nodes->lav7,
752 out_data[i], &escape);
753 break;
754 }
755
756 if (escape) {
757 esc_idx[esc_contrl++] = i;
758 } else {
759 ixheaacd_mps_sym_restore(it_bit_buff, lav, out_data[i]);
760 }
761 }
762
763 if (esc_contrl > 0) {
764 ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0,
765 2 * esc_contrl, (2 * lav + 1));
766
767 for (i = 0; i < esc_contrl; i++) {
768 out_data[esc_idx[i]][0] = esc_data[0][i] - lav;
769 out_data[esc_idx[i]][1] = esc_data[1][i] - lav;
770 }
771 }
772
773 return;
774 }
775
ixheaacd_mps_huff_dec_ipd_2d(ia_handle_bit_buf_struct it_bit_buff,const ia_huff_ipd_node_2d_struct * huff_nodes,WORD32 out_data[][2],WORD32 num_val,WORD32 ch_fac,WORD32 * p0_data[2])776 static VOID ixheaacd_mps_huff_dec_ipd_2d(
777 ia_handle_bit_buf_struct it_bit_buff,
778 const ia_huff_ipd_node_2d_struct* huff_nodes, WORD32 out_data[][2],
779 WORD32 num_val, WORD32 ch_fac, WORD32* p0_data[2]) {
780 WORD32 i = 0, lav = 0, escape = 0, esc_contrl = 0;
781 WORD32 node = 0;
782 UWORD32 data = 0;
783
784 WORD32 esc_data[2][MAXBANDS] = {{0}};
785 WORD32 esc_idx[MAXBANDS] = {0};
786
787 ixheaacd_mps_huff_read(
788 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_lav_idx_nodes.node_tab,
789 &node);
790
791 data = -(node + 1);
792 if (data == 0)
793 data = 3;
794 else
795 data--;
796
797 lav = 2 * data + 1;
798
799 if (p0_data[0] != NULL) {
800 ixheaacd_mps_huff_read(
801 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab,
802 &node);
803 *p0_data[0] = -(node + 1);
804 }
805 if (p0_data[1] != NULL) {
806 ixheaacd_mps_huff_read(
807 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_ipd_nodes.hp0.node_tab,
808 &node);
809 *p0_data[1] = -(node + 1);
810 }
811
812 for (i = 0; i < num_val; i += ch_fac) {
813 switch (lav) {
814 case 1:
815 ixheaacd_mps_huff_read_2d(it_bit_buff,
816 (ia_huff_node_struct)&huff_nodes->lav1,
817 out_data[i], &escape);
818 break;
819 case 3:
820 ixheaacd_mps_huff_read_2d(it_bit_buff,
821 (ia_huff_node_struct)&huff_nodes->lav3,
822 out_data[i], &escape);
823 break;
824 case 5:
825 ixheaacd_mps_huff_read_2d(it_bit_buff,
826 (ia_huff_node_struct)&huff_nodes->lav5,
827 out_data[i], &escape);
828 break;
829 case 7:
830 ixheaacd_mps_huff_read_2d(it_bit_buff,
831 (ia_huff_node_struct)&huff_nodes->lav7,
832 out_data[i], &escape);
833 break;
834 }
835
836 if (escape) {
837 esc_idx[esc_contrl++] = i;
838 } else {
839 ixheaacd_mps_sym_restoreipd(it_bit_buff, lav, out_data[i]);
840 }
841 }
842
843 if (esc_contrl > 0) {
844 ixheaacd_mps_pcm_decode(it_bit_buff, esc_data[0], esc_data[1], 0,
845 2 * esc_contrl, (2 * lav + 1));
846
847 for (i = 0; i < esc_contrl; i++) {
848 out_data[esc_idx[i]][0] = esc_data[0][i] - lav;
849 out_data[esc_idx[i]][1] = esc_data[1][i] - lav;
850 }
851 }
852
853 return;
854 }
855
ixheaacd_huff_decode(ia_handle_bit_buf_struct it_bit_buff,WORD32 * out_data_1,WORD32 * out_data_2,WORD32 data_type,WORD32 diff_type_1,WORD32 diff_type_2,WORD32 pilot_coding_flag,WORD32 * pilot_data,WORD32 num_val,WORD32 * cdg_scheme)856 static WORD32 ixheaacd_huff_decode(ia_handle_bit_buf_struct it_bit_buff,
857 WORD32* out_data_1, WORD32* out_data_2,
858 WORD32 data_type, WORD32 diff_type_1,
859 WORD32 diff_type_2, WORD32 pilot_coding_flag,
860 WORD32* pilot_data, WORD32 num_val,
861 WORD32* cdg_scheme) {
862 WORD32 diff_type;
863
864 WORD32 i = 0;
865 UWORD32 data = 0;
866
867 WORD32 pair_vec[MAXBANDS][2];
868
869 WORD32* p0_data_1[2] = {NULL, NULL};
870 WORD32* p0_data_2[2] = {NULL, NULL};
871
872 WORD32 p0_flag[2];
873
874 WORD32 num_val_1_int = num_val;
875 WORD32 num_val_2_int = num_val;
876
877 WORD32* out_data_1_int = out_data_1;
878 WORD32* out_data_2_int = out_data_2;
879
880 WORD32 df_rest_flag_1 = 0;
881 WORD32 df_rest_flag_2 = 0;
882
883 WORD32 huff_yy_1;
884 WORD32 huff_yy_2;
885 WORD32 huff_yy;
886
887 if (pilot_coding_flag) {
888 switch (data_type) {
889 case CLD:
890 if (out_data_1 != NULL) {
891 ixheaacd_mps_huff_dec_pilot(
892 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_pilot_nodes.cld,
893 pilot_data);
894 }
895 break;
896
897 case ICC:
898 if (out_data_1 != NULL) {
899 ixheaacd_mps_huff_dec_pilot(
900 it_bit_buff, (ia_huff_node_struct)&ixheaacd_huff_pilot_nodes.icc,
901 pilot_data);
902 }
903 break;
904
905 default:
906 if (out_data_1 != NULL) {
907 return 0;
908 }
909 break;
910 }
911 }
912
913 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
914 *cdg_scheme = data << PAIR_SHIFT;
915
916 if (*cdg_scheme >> PAIR_SHIFT == HUFF_2D) {
917 if ((out_data_1 != NULL) && (out_data_2 != NULL)) {
918 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
919 *cdg_scheme |= data;
920 } else {
921 *cdg_scheme |= FREQ_PAIR;
922 }
923 }
924
925 if (pilot_coding_flag) {
926 huff_yy_1 = PCM_PLT;
927 huff_yy_2 = PCM_PLT;
928 } else {
929 huff_yy_1 = diff_type_1;
930 huff_yy_2 = diff_type_2;
931 }
932
933 switch (*cdg_scheme >> PAIR_SHIFT) {
934 case HUFF_1D:
935
936 p0_flag[0] = (diff_type_1 == DIFF_FREQ) && !pilot_coding_flag;
937 p0_flag[1] = (diff_type_2 == DIFF_FREQ) && !pilot_coding_flag;
938
939 switch (data_type) {
940 case CLD:
941 if (out_data_1 != NULL) {
942 ixheaacd_mps_huff_dec_cld_1d(
943 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_1],
944 out_data_1, num_val_1_int, p0_flag[0]);
945 }
946 if (out_data_2 != NULL) {
947 ixheaacd_mps_huff_dec_cld_1d(
948 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_2],
949 out_data_2, num_val_2_int, p0_flag[1]);
950 }
951
952 break;
953
954 case ICC:
955 if (out_data_1 != NULL) {
956 ixheaacd_mps_huff_dec_icc_1d(
957 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_1],
958 out_data_1, num_val_1_int, p0_flag[0]);
959 }
960 if (out_data_2 != NULL) {
961 ixheaacd_mps_huff_dec_icc_1d(
962 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_2],
963 out_data_2, num_val_2_int, p0_flag[1]);
964 }
965
966 break;
967
968 case IPD:
969 if (out_data_1 != NULL) {
970 ixheaacd_mps_huff_dec_ipd_1d(
971 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_1],
972 out_data_1, num_val_1_int, p0_flag[0]);
973 }
974 if (out_data_2 != NULL) {
975 ixheaacd_mps_huff_dec_ipd_1d(
976 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_2],
977 out_data_2, num_val_2_int, p0_flag[1]);
978 }
979
980 break;
981
982 default:
983 break;
984 }
985
986 break;
987
988 case HUFF_2D:
989
990 switch (*cdg_scheme & PAIR_MASK) {
991 case FREQ_PAIR:
992
993 if (out_data_1 != NULL) {
994 if (!pilot_coding_flag && diff_type_1 == DIFF_FREQ) {
995 p0_data_1[0] = &out_data_1[0];
996 p0_data_1[1] = NULL;
997
998 num_val_1_int -= 1;
999 out_data_1_int += 1;
1000 }
1001 df_rest_flag_1 = num_val_1_int % 2;
1002 if (df_rest_flag_1) num_val_1_int -= 1;
1003 }
1004 if (out_data_2 != NULL) {
1005 if (!pilot_coding_flag && diff_type_2 == DIFF_FREQ) {
1006 p0_data_2[0] = NULL;
1007 p0_data_2[1] = &out_data_2[0];
1008
1009 num_val_2_int -= 1;
1010 out_data_2_int += 1;
1011 }
1012 df_rest_flag_2 = num_val_2_int % 2;
1013 if (df_rest_flag_2) num_val_2_int -= 1;
1014 }
1015
1016 switch (data_type) {
1017 case CLD:
1018
1019 if (out_data_1 != NULL) {
1020 ixheaacd_mps_huff_dec_cld_2d(
1021 it_bit_buff,
1022 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy_1][FREQ_PAIR],
1023 pair_vec, num_val_1_int, 2, p0_data_1);
1024 if (df_rest_flag_1) {
1025 ixheaacd_mps_huff_dec_cld_1d(
1026 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_1],
1027 out_data_1_int + num_val_1_int, 1, 0);
1028 }
1029 }
1030 if (out_data_2 != NULL) {
1031 ixheaacd_mps_huff_dec_cld_2d(
1032 it_bit_buff,
1033 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy_2][FREQ_PAIR],
1034 pair_vec + 1, num_val_2_int, 2, p0_data_2);
1035 if (df_rest_flag_2) {
1036 ixheaacd_mps_huff_dec_cld_1d(
1037 it_bit_buff, &ixheaacd_huff_cld_nodes.h_1_dim[huff_yy_2],
1038 out_data_2_int + num_val_2_int, 1, 0);
1039 }
1040 }
1041 break;
1042
1043 case ICC:
1044 if (out_data_1 != NULL) {
1045 ixheaacd_mps_huff_dec_icc_2d(
1046 it_bit_buff,
1047 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy_1][FREQ_PAIR],
1048 pair_vec, num_val_1_int, 2, p0_data_1);
1049 if (df_rest_flag_1) {
1050 ixheaacd_mps_huff_dec_icc_1d(
1051 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_1],
1052 out_data_1_int + num_val_1_int, 1, 0);
1053 }
1054 }
1055 if (out_data_2 != NULL) {
1056 ixheaacd_mps_huff_dec_icc_2d(
1057 it_bit_buff,
1058 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy_2][FREQ_PAIR],
1059 pair_vec + 1, num_val_2_int, 2, p0_data_2);
1060 if (df_rest_flag_2) {
1061 ixheaacd_mps_huff_dec_icc_1d(
1062 it_bit_buff, &ixheaacd_huff_icc_nodes.h_1_dim[huff_yy_2],
1063 out_data_2_int + num_val_2_int, 1, 0);
1064 }
1065 }
1066 break;
1067
1068 case IPD:
1069 if (out_data_1 != NULL) {
1070 ixheaacd_mps_huff_dec_ipd_2d(
1071 it_bit_buff,
1072 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy_1][FREQ_PAIR],
1073 pair_vec, num_val_1_int, 2, p0_data_1);
1074 if (df_rest_flag_1) {
1075 ixheaacd_mps_huff_dec_ipd_1d(
1076 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_1],
1077 out_data_1_int + num_val_1_int, 1, 0);
1078 }
1079 }
1080 if (out_data_2 != NULL) {
1081 ixheaacd_mps_huff_dec_ipd_2d(
1082 it_bit_buff,
1083 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy_2][FREQ_PAIR],
1084 pair_vec + 1, num_val_2_int, 2, p0_data_2);
1085 if (df_rest_flag_2) {
1086 ixheaacd_mps_huff_dec_ipd_1d(
1087 it_bit_buff, &ixheaacd_huff_ipd_nodes.h_1_dim[huff_yy_2],
1088 out_data_2_int + num_val_2_int, 1, 0);
1089 }
1090 }
1091 break;
1092
1093 default:
1094 break;
1095 }
1096
1097 if (out_data_1 != NULL) {
1098 for (i = 0; i < num_val_1_int - 1; i += 2) {
1099 out_data_1_int[i] = pair_vec[i][0];
1100 out_data_1_int[i + 1] = pair_vec[i][1];
1101 }
1102 }
1103 if (out_data_2 != NULL) {
1104 for (i = 0; i < num_val_2_int - 1; i += 2) {
1105 out_data_2_int[i] = pair_vec[i + 1][0];
1106 out_data_2_int[i + 1] = pair_vec[i + 1][1];
1107 }
1108 }
1109
1110 break;
1111
1112 case TIME_PAIR:
1113
1114 if (!pilot_coding_flag &&
1115 ((diff_type_1 == DIFF_FREQ) || (diff_type_2 == DIFF_FREQ))) {
1116 p0_data_1[0] = &out_data_1[0];
1117 p0_data_1[1] = &out_data_2[0];
1118
1119 out_data_1_int += 1;
1120 out_data_2_int += 1;
1121
1122 num_val_1_int -= 1;
1123 }
1124
1125 if ((diff_type_1 == DIFF_TIME) || (diff_type_2 == DIFF_TIME)) {
1126 diff_type = DIFF_TIME;
1127 } else {
1128 diff_type = DIFF_FREQ;
1129 }
1130 if (pilot_coding_flag) {
1131 huff_yy = PCM_PLT;
1132 } else {
1133 huff_yy = diff_type;
1134 }
1135
1136 switch (data_type) {
1137 case CLD:
1138 ixheaacd_mps_huff_dec_cld_2d(
1139 it_bit_buff,
1140 &ixheaacd_huff_cld_nodes.h_2_dim[huff_yy][TIME_PAIR],
1141 pair_vec, num_val_1_int, 1, p0_data_1);
1142 break;
1143
1144 case ICC:
1145 ixheaacd_mps_huff_dec_icc_2d(
1146 it_bit_buff,
1147 &ixheaacd_huff_icc_nodes.h_2_dim[huff_yy][TIME_PAIR],
1148 pair_vec, num_val_1_int, 1, p0_data_1);
1149 break;
1150
1151 case IPD:
1152 ixheaacd_mps_huff_dec_ipd_2d(
1153 it_bit_buff,
1154 &ixheaacd_huff_ipd_nodes.h_2_dim[huff_yy][TIME_PAIR],
1155 pair_vec, num_val_1_int, 1, p0_data_1);
1156 break;
1157
1158 default:
1159 break;
1160 }
1161
1162 for (i = 0; i < num_val_1_int; i++) {
1163 out_data_1_int[i] = pair_vec[i][0];
1164 out_data_2_int[i] = pair_vec[i][1];
1165 }
1166
1167 break;
1168
1169 default:
1170 break;
1171 }
1172
1173 break;
1174
1175 default:
1176 break;
1177 }
1178
1179 return 1;
1180 }
1181
ixheaacd_diff_freq_decode(WORD32 * diff_data,WORD32 * out_data,WORD32 num_val)1182 static VOID ixheaacd_diff_freq_decode(WORD32* diff_data, WORD32* out_data,
1183 WORD32 num_val) {
1184 WORD32 i = 0;
1185
1186 out_data[0] = diff_data[0];
1187
1188 for (i = 1; i < num_val; i++) {
1189 out_data[i] = out_data[i - 1] + diff_data[i];
1190 }
1191 }
1192
ixheaacd_mps_diff_time_dec_bwd(WORD32 * prev_data,WORD32 * diff_data,WORD32 * out_data,WORD32 mixed_diff_type,WORD32 num_val)1193 static VOID ixheaacd_mps_diff_time_dec_bwd(WORD32* prev_data, WORD32* diff_data,
1194 WORD32* out_data,
1195 WORD32 mixed_diff_type,
1196 WORD32 num_val) {
1197 WORD32 i = 0;
1198
1199 if (mixed_diff_type) {
1200 out_data[0] = diff_data[0];
1201 for (i = 1; i < num_val; i++) {
1202 out_data[i] = prev_data[i] + diff_data[i];
1203 }
1204 } else {
1205 for (i = 0; i < num_val; i++) {
1206 out_data[i] = prev_data[i] + diff_data[i];
1207 }
1208 }
1209 }
1210
ixheaacd_mps_diff_time_dec_fwd(WORD32 * prev_data,WORD32 * diff_data,WORD32 * out_data,WORD32 mixed_diff_type,WORD32 num_val)1211 static VOID ixheaacd_mps_diff_time_dec_fwd(WORD32* prev_data, WORD32* diff_data,
1212 WORD32* out_data,
1213 WORD32 mixed_diff_type,
1214 WORD32 num_val) {
1215 WORD32 i = 0;
1216
1217 if (mixed_diff_type) {
1218 out_data[0] = diff_data[0];
1219 for (i = 1; i < num_val; i++) {
1220 out_data[i] = prev_data[i] - diff_data[i];
1221 }
1222 } else {
1223 for (i = 0; i < num_val; i++) {
1224 out_data[i] = prev_data[i] - diff_data[i];
1225 }
1226 }
1227 }
1228
ixheaacd_attach_lsb(ia_handle_bit_buf_struct it_bit_buff,WORD32 * in_data_msb,WORD32 ixheaacd_drc_offset,WORD32 num_lsb,WORD32 num_val,WORD32 * out_data)1229 static VOID ixheaacd_attach_lsb(ia_handle_bit_buf_struct it_bit_buff,
1230 WORD32* in_data_msb, WORD32 ixheaacd_drc_offset,
1231 WORD32 num_lsb, WORD32 num_val,
1232 WORD32* out_data) {
1233 WORD32 i = 0, lsb = 0, msb = 0;
1234 UWORD32 data = 0;
1235
1236 for (i = 0; i < num_val; i++) {
1237 msb = in_data_msb[i];
1238
1239 if (num_lsb > 0) {
1240 data = ixheaacd_read_bits_buf(it_bit_buff, num_lsb);
1241 lsb = data;
1242
1243 out_data[i] = ((msb << num_lsb) | lsb) - ixheaacd_drc_offset;
1244 } else
1245 out_data[i] = msb - ixheaacd_drc_offset;
1246 }
1247
1248 return;
1249 }
1250
ixheaacd_mps_ecdatapairdec(ia_handle_bit_buf_struct it_bit_buff,WORD32 outdata[][MAXBANDS],WORD32 history[MAXBANDS],WORD32 data_type,WORD32 set_idx,WORD32 data_bands,WORD32 pair_flag,WORD32 coarse_flag,WORD32 independency_flag)1251 WORD32 ixheaacd_mps_ecdatapairdec(ia_handle_bit_buf_struct it_bit_buff,
1252 WORD32 outdata[][MAXBANDS],
1253 WORD32 history[MAXBANDS], WORD32 data_type,
1254 WORD32 set_idx, WORD32 data_bands,
1255 WORD32 pair_flag, WORD32 coarse_flag,
1256 WORD32 independency_flag)
1257
1258 {
1259 WORD32 diff_time_back_flag = !independency_flag || (set_idx > 0);
1260 WORD32 attach_lsb_flag = 0;
1261 WORD32 pcm_coding_flag = 0;
1262 WORD32 pilot_coding_flag = 0;
1263 WORD32 pilot_data[2] = {0, 0};
1264 WORD32 mixed_time_pair = 0, pcm_val = 0;
1265 WORD32 quant_levels = 0, quant_offset = 0;
1266 UWORD32 data = 0;
1267 WORD32 band_start = 0;
1268
1269 WORD32 data_pair[2][MAXBANDS] = {{0}};
1270 WORD32 data_diff[2][MAXBANDS] = {{0}};
1271
1272 WORD32 msb_state[MAXBANDS] = {0};
1273
1274 WORD32* data_array[2] = {NULL, NULL};
1275
1276 WORD32 diff_type[2] = {DIFF_FREQ, DIFF_FREQ};
1277 WORD32 cdg_scheme = HUFF_1D;
1278 WORD32 direction = BACKWARDS;
1279
1280 switch (data_type) {
1281 case CLD:
1282 if (coarse_flag) {
1283 attach_lsb_flag = 0;
1284 quant_levels = 15;
1285 quant_offset = 7;
1286 } else {
1287 attach_lsb_flag = 0;
1288 quant_levels = 31;
1289 quant_offset = 15;
1290 }
1291
1292 break;
1293
1294 case ICC:
1295 if (coarse_flag) {
1296 attach_lsb_flag = 0;
1297 quant_levels = 4;
1298 quant_offset = 0;
1299 } else {
1300 attach_lsb_flag = 0;
1301 quant_levels = 8;
1302 quant_offset = 0;
1303 }
1304
1305 break;
1306
1307 case IPD:
1308 if (coarse_flag) {
1309 attach_lsb_flag = 0;
1310 quant_levels = 8;
1311 quant_offset = 0;
1312 } else {
1313 attach_lsb_flag = 1;
1314 quant_levels = 16;
1315 quant_offset = 0;
1316 }
1317 break;
1318
1319 default:
1320 fprintf(stderr, "Unknown type of data!\n");
1321 return -1;
1322 }
1323
1324 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
1325 pcm_coding_flag = data;
1326
1327 pilot_coding_flag = 0;
1328
1329 if (pcm_coding_flag && !pilot_coding_flag) {
1330 if (pair_flag) {
1331 data_array[0] = data_pair[0];
1332 data_array[1] = data_pair[1];
1333 pcm_val = 2 * data_bands;
1334 } else {
1335 data_array[0] = data_pair[0];
1336 data_array[1] = NULL;
1337 pcm_val = data_bands;
1338 }
1339
1340 ixheaacd_mps_pcm_decode(it_bit_buff, data_array[0], data_array[1],
1341 quant_offset, pcm_val, quant_levels);
1342
1343 } else {
1344 if (pair_flag) {
1345 data_array[0] = data_diff[0];
1346 data_array[1] = data_diff[1];
1347 } else {
1348 data_array[0] = data_diff[0];
1349 data_array[1] = NULL;
1350 }
1351
1352 diff_type[0] = DIFF_FREQ;
1353 diff_type[1] = DIFF_FREQ;
1354
1355 direction = BACKWARDS;
1356
1357 if (!pilot_coding_flag) {
1358 if (pair_flag || diff_time_back_flag) {
1359 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
1360 diff_type[0] = data;
1361 }
1362
1363 if (pair_flag && ((diff_type[0] == DIFF_FREQ) || diff_time_back_flag)) {
1364 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
1365 diff_type[1] = data;
1366 }
1367 }
1368
1369 if (data_bands <= 0) return -1;
1370
1371 if (!ixheaacd_huff_decode(it_bit_buff, data_array[0], data_array[1],
1372 data_type, diff_type[0], diff_type[1],
1373 pilot_coding_flag, pilot_data, data_bands,
1374 &cdg_scheme)) {
1375 return 0;
1376 }
1377
1378 if ((diff_type[0] == DIFF_TIME) || (diff_type[1] == DIFF_TIME)) {
1379 if (pair_flag) {
1380 if ((diff_type[0] == DIFF_TIME) && !diff_time_back_flag) {
1381 direction = FORWARDS;
1382 } else if (diff_type[1] == DIFF_TIME) {
1383 direction = BACKWARDS;
1384 } else {
1385 data = ixheaacd_read_bits_buf(it_bit_buff, 1);
1386 direction = data;
1387 }
1388 } else {
1389 direction = BACKWARDS;
1390 }
1391 }
1392
1393 mixed_time_pair = (diff_type[0] != diff_type[1]) &&
1394 ((cdg_scheme & PAIR_MASK) == TIME_PAIR);
1395
1396 if (direction == BACKWARDS) {
1397 if (diff_type[0] == DIFF_FREQ) {
1398 ixheaacd_diff_freq_decode(data_diff[0], data_pair[0], data_bands);
1399 } else {
1400 WORD32 i;
1401 for (i = 0; i < data_bands; i++) {
1402 msb_state[i] = history[i + band_start] + quant_offset;
1403 if (attach_lsb_flag) {
1404 msb_state[i] >>= 1;
1405 }
1406 }
1407 ixheaacd_mps_diff_time_dec_bwd(msb_state, data_diff[0], data_pair[0],
1408 mixed_time_pair, data_bands);
1409 }
1410 if (diff_type[1] == DIFF_FREQ) {
1411 ixheaacd_diff_freq_decode(data_diff[1], data_pair[1], data_bands);
1412 } else {
1413 ixheaacd_mps_diff_time_dec_bwd(data_pair[0], data_diff[1], data_pair[1],
1414 mixed_time_pair, data_bands);
1415 }
1416 } else {
1417 ixheaacd_diff_freq_decode(data_diff[1], data_pair[1], data_bands);
1418
1419 if (diff_type[0] == DIFF_FREQ) {
1420 ixheaacd_diff_freq_decode(data_diff[0], data_pair[0], data_bands);
1421 } else {
1422 ixheaacd_mps_diff_time_dec_fwd(data_pair[1], data_diff[0], data_pair[0],
1423 mixed_time_pair, data_bands);
1424 }
1425 }
1426
1427 ixheaacd_attach_lsb(it_bit_buff, data_pair[0], quant_offset,
1428 attach_lsb_flag ? 1 : 0, data_bands, data_pair[0]);
1429 if (pair_flag) {
1430 ixheaacd_attach_lsb(it_bit_buff, data_pair[1], quant_offset,
1431 attach_lsb_flag ? 1 : 0, data_bands, data_pair[1]);
1432 }
1433 }
1434
1435 memcpy(outdata[set_idx] + band_start, data_pair[0],
1436 sizeof(WORD32) * data_bands);
1437 if (pair_flag) {
1438 memcpy(outdata[set_idx + 1] + band_start, data_pair[1],
1439 sizeof(WORD32) * data_bands);
1440 }
1441
1442 return IA_NO_ERROR;
1443 }
1444
ixheaacd_mps_huff_decode(ia_handle_bit_buf_struct it_bit_buff,WORD32 * out_data,WORD32 num_val)1445 VOID ixheaacd_mps_huff_decode(ia_handle_bit_buf_struct it_bit_buff,
1446 WORD32* out_data, WORD32 num_val) {
1447 WORD32 val_rcvd = 0, dummy = 0, i = 0, val = 0, len = 0;
1448 WORD32 rl_data[2] = {0};
1449
1450 while (val_rcvd < num_val) {
1451 ixheaacd_mps_huff_read_2d(it_bit_buff,
1452 (ia_huff_node_struct)&ixheaacd_huff_reshape_nodes,
1453 rl_data, &dummy);
1454 val = rl_data[0];
1455 len = rl_data[1] + 1;
1456 for (i = val_rcvd; i < val_rcvd + len; i++) {
1457 out_data[i] = val;
1458 }
1459 val_rcvd += len;
1460 }
1461
1462 return;
1463 }
1464