/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 24 cmn w2, #4095 label 26 cmn x3, #1, lsl #12 label 30 cmn w3, #291, lsl #12 label 31 cmn wsp, #1365 label 32 cmn sp, #1092, lsl #12 label 69 cmn w3, w5 label 82 cmn x3, x5 label 142 cmn wzr, w4 label 143 cmn w5, wzr label 144 cmn w6, w7 label [all …]
|
/external/llvm-project/flang/test/Semantics/ |
D | omp-copyin03.f90 | 11 common /cmn/ j, k common
|
D | omp-copyin01.f90 | 11 common /cmn/ j common
|
D | omp-copyin05.f90 | 14 common /cmn/ a common
|
D | omp-copyin02.f90 | 9 common /cmn/ a common
|
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
D | m7-int.s | 59 cmn r0, #1 label 60 cmn r0, r1 label
|
D | m4-int.s | 61 cmn r0, #1 label 62 cmn r0, r1 label
|
/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 104 __ cmn(w5, w6); in GenerateTestSequenceBase() local 105 __ cmn(x7, x8); in GenerateTestSequenceBase() local
|
/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 2146 void cmn(Register rn, const Operand& operand) { cmn(al, Best, rn, operand); } in cmn() function 2147 void cmn(Condition cond, Register rn, const Operand& operand) { in cmn() function 2150 void cmn(EncodingSize size, Register rn, const Operand& operand) { in cmn() function
|
D | assembler-aarch32.cc | 3825 void Assembler::cmn(Condition cond, in cmn() function in vixl::aarch32::Assembler
|
D | disasm-aarch32.cc | 1380 void Disassembler::cmn(Condition cond, in cmn() function in vixl::aarch32::Disassembler
|
/external/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 1480 void AssemblerARM32::cmn(const Operand *OpRn, const Operand *OpSrc1, in cmn() function in Ice::ARM32::AssemblerARM32
|
/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 483 void Assembler::cmn(const Register& rn, const Operand& operand) { in cmn() function in vixl::aarch64::Assembler
|
/external/vixl/benchmarks/aarch32/ |
D | asm-disasm-speed-test.cc | 4452 __ cmn(r9, r7); in Generate_34() local
|