/external/llvm-project/llvm/test/MC/ARM/ |
D | mve-scalar-shift.s | 84 csinv lr, r5, zr, hs label 88 csinv lr, r2, r2, mi label
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D | thumbv8.1m.s | 1108 csinv lr, r5, zr, hs label 1113 csinv lr, r2, r2, mi label 1136 csinv r0, sp, r1, eq label 1138 csinv r0, pc, r1, eq label 1160 csinv r0, r0, r1, ge label
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/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 398 csinv w1, w0, w19, ne label 399 csinv wzr, w5, w9, eq label 400 csinv w9, wzr, w30, gt label 401 csinv w1, w28, wzr, mi label 402 csinv x19, x23, x29, lt label 403 csinv xzr, x3, x4, ge label 404 csinv x5, xzr, x6, hs label 405 csinv x7, x8, xzr, lo label 419 csinv x3, xzr, xzr, nv label 434 csinv x1, x0, x0, al label [all …]
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 134 __ csinv(w29, w2, w3, eq); in GenerateTestSequenceBase() local 135 __ csinv(w29, w2, w3, ne); in GenerateTestSequenceBase() local 136 __ csinv(x4, x5, x6, cc); in GenerateTestSequenceBase() local 137 __ csinv(x4, x5, x6, cs); in GenerateTestSequenceBase() local
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 740 void Assembler::csinv(const Register& rd, in csinv() function in vixl::aarch64::Assembler
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