/external/llvm-project/llvm/test/MC/ARM/ |
D | mve-scalar-shift.s | 64 csneg lr, r10, r10, lo label 92 csneg lr, r1, r11, vc label
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D | thumbv8.1m.s | 1083 csneg lr, r10, r10, lo label 1141 csneg r0, sp, r1, eq label 1143 csneg r0, pc, r1, eq label 1164 csneg r0, r0, r1, gt label
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/external/llvm-project/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
D | A55-basic-instructions.s | 406 csneg w1, w0, w19, ne label 407 csneg wzr, w5, w9, eq label 408 csneg w9, wzr, w30, gt label 409 csneg w1, w28, wzr, mi label 410 csneg x19, x23, x29, lt label 411 csneg xzr, x3, x4, ge label 412 csneg x5, xzr, x6, hs label 413 csneg x7, x8, xzr, lo label 442 csneg x4, x8, x8, al label
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 138 __ csneg(w7, w8, w9, hi); in GenerateTestSequenceBase() local 139 __ csneg(w7, w8, w9, ls); in GenerateTestSequenceBase() local 140 __ csneg(x10, x11, x12, eq); in GenerateTestSequenceBase() local 141 __ csneg(x10, x11, x12, ne); in GenerateTestSequenceBase() local
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.cc | 748 void Assembler::csneg(const Register& rd, in csneg() function in vixl::aarch64::Assembler
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