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1 /*
2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3  * Copyright © 2018 Google, Inc.
4  *
5  * Permission is hereby granted, free of charge, to any person obtaining a
6  * copy of this software and associated documentation files (the "Software"),
7  * to deal in the Software without restriction, including without limitation
8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9  * and/or sell copies of the Software, and to permit persons to whom the
10  * Software is furnished to do so, subject to the following conditions:
11  *
12  * The above copyright notice and this permission notice (including the next
13  * paragraph) shall be included in all copies or substantial portions of the
14  * Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22  * SOFTWARE.
23  *
24  * Authors:
25  *    Rob Clark <robclark@freedesktop.org>
26  */
27 
28 #include "drm-uapi/drm_fourcc.h"
29 #include "pipe/p_screen.h"
30 #include "util/format/u_format.h"
31 
32 #include "fd6_screen.h"
33 #include "fd6_blitter.h"
34 #include "fd6_context.h"
35 #include "fd6_emit.h"
36 #include "fd6_format.h"
37 #include "fd6_resource.h"
38 
39 #include "ir3/ir3_compiler.h"
40 
41 static bool
valid_sample_count(unsigned sample_count)42 valid_sample_count(unsigned sample_count)
43 {
44 	switch (sample_count) {
45 	case 0:
46 	case 1:
47 	case 2:
48 	case 4:
49 // TODO seems 8x works, but increases lrz width or height.. but the
50 // blob I have doesn't seem to expose any egl configs w/ 8x, so
51 // just hide it for now and revisit later.
52 //	case 8:
53 		return true;
54 	default:
55 		return false;
56 	}
57 }
58 
59 static bool
fd6_screen_is_format_supported(struct pipe_screen * pscreen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned usage)60 fd6_screen_is_format_supported(struct pipe_screen *pscreen,
61 		enum pipe_format format,
62 		enum pipe_texture_target target,
63 		unsigned sample_count,
64 		unsigned storage_sample_count,
65 		unsigned usage)
66 {
67 	unsigned retval = 0;
68 
69 	if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
70 			!valid_sample_count(sample_count)) {
71 		DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
72 				util_format_name(format), target, sample_count, usage);
73 		return false;
74 	}
75 
76 	if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
77 		return false;
78 
79 	if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
80 			(fd6_pipe2vtx(format) != FMT6_NONE)) {
81 		retval |= PIPE_BIND_VERTEX_BUFFER;
82 	}
83 
84 	if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
85 			(fd6_pipe2tex(format) != FMT6_NONE) &&
86 			(target == PIPE_BUFFER ||
87 			 util_format_get_blocksize(format) != 12)) {
88 		retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
89 	}
90 
91 	if ((usage & (PIPE_BIND_RENDER_TARGET |
92 				PIPE_BIND_DISPLAY_TARGET |
93 				PIPE_BIND_SCANOUT |
94 				PIPE_BIND_SHARED |
95 				PIPE_BIND_COMPUTE_RESOURCE)) &&
96 			(fd6_pipe2color(format) != FMT6_NONE) &&
97 			(fd6_pipe2tex(format) != FMT6_NONE)) {
98 		retval |= usage & (PIPE_BIND_RENDER_TARGET |
99 				PIPE_BIND_DISPLAY_TARGET |
100 				PIPE_BIND_SCANOUT |
101 				PIPE_BIND_SHARED |
102 				PIPE_BIND_COMPUTE_RESOURCE);
103 	}
104 
105 	/* For ARB_framebuffer_no_attachments: */
106 	if ((usage & PIPE_BIND_RENDER_TARGET) && (format == PIPE_FORMAT_NONE)) {
107 		retval |= usage & PIPE_BIND_RENDER_TARGET;
108 	}
109 
110 	if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
111 			(fd6_pipe2depth(format) != (enum a6xx_depth_format)~0) &&
112 			(fd6_pipe2tex(format) != FMT6_NONE)) {
113 		retval |= PIPE_BIND_DEPTH_STENCIL;
114 	}
115 
116 	if ((usage & PIPE_BIND_INDEX_BUFFER) &&
117 			(fd_pipe2index(format) != (enum pc_di_index_size)~0)) {
118 		retval |= PIPE_BIND_INDEX_BUFFER;
119 	}
120 
121 	if (retval != usage) {
122 		DBG("not supported: format=%s, target=%d, sample_count=%d, "
123 				"usage=%x, retval=%x", util_format_name(format),
124 				target, sample_count, usage, retval);
125 	}
126 
127 	return retval == usage;
128 }
129 
130 void
fd6_screen_init(struct pipe_screen * pscreen)131 fd6_screen_init(struct pipe_screen *pscreen)
132 {
133 	struct fd_screen *screen = fd_screen(pscreen);
134 	screen->max_rts = A6XX_MAX_RENDER_TARGETS;
135 	screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id);
136 	pscreen->context_create = fd6_context_create;
137 	pscreen->is_format_supported = fd6_screen_is_format_supported;
138 
139 	screen->tile_mode = fd6_tile_mode;
140 
141 	fd6_resource_screen_init(pscreen);
142 	fd6_emit_init_screen(pscreen);
143 	ir3_screen_init(pscreen);
144 }
145