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1 /*
2  * Copyright © 2019 Google, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21  * IN THE SOFTWARE.
22  */
23 
24 #ifndef FREEDRENO_LAYOUT_H_
25 #define FREEDRENO_LAYOUT_H_
26 
27 #include <stdbool.h>
28 #include <stdint.h>
29 
30 #include "util/u_debug.h"
31 #include "util/u_math.h"
32 #include "util/format/u_format.h"
33 
34 /* Shared freedreno mipmap layout helper
35  *
36  * It does *not* attempt to track surface transitions, in particular
37  * about UBWC state.  Possibly it should, but
38  *  (a) I'm not sure if in all cases we can transparently do in-
39  *      place transitions (ie. a5xx textures with interleaved
40  *      meta and pixel data
41  *  (b) Even if we can, we probably can't assume that we have
42  *      figured out yet how to do in-place transition for every
43  *      generation.
44  */
45 
46 /* Texture Layout on a3xx:
47  * -----------------------
48  *
49  * Each mipmap-level contains all of it's layers (ie. all cubmap
50  * faces, all 1d/2d array elements, etc).  The texture sampler is
51  * programmed with the start address of each mipmap level, and hw
52  * derives the layer offset within the level.
53  *
54  *
55  * Texture Layout on a4xx+:
56  * -----------------------
57  *
58  * For cubemap and 2d array, each layer contains all of it's mipmap
59  * levels (layer_first layout).
60  *
61  * 3d textures are laid out as on a3xx.
62  *
63  * In either case, the slice represents the per-miplevel information,
64  * but in layer_first layout it only includes the first layer, and
65  * an additional offset of (rsc->layer_size * layer) must be added.
66  *
67  *
68  * UBWC Color Compressions (a5xx+):
69  * -------------------------------
70  *
71  * Color compression is only supported for tiled layouts.  In general
72  * the meta "flag" buffer (ie. what holds the compression state for
73  * each block) can be separate from the color data, except for textures
74  * on a5xx where it needs to be interleaved with layers/levels of a
75  * texture.
76  */
77 
78 #define FDL_MAX_MIP_LEVELS 15
79 
80 struct fdl_slice {
81 	uint32_t offset;         /* offset of first layer in slice */
82 	uint32_t size0;          /* size of first layer in slice */
83 };
84 
85 /* parameters for explicit (imported) layout */
86 struct fdl_explicit_layout {
87 	uint32_t offset;
88 	uint32_t pitch;
89 };
90 
91 /**
92  * Encapsulates the layout of a resource, including position of given 2d
93  * surface (layer, level) within.  Or rather all the information needed
94  * to derive this.
95  */
96 struct fdl_layout {
97 	struct fdl_slice slices[FDL_MAX_MIP_LEVELS];
98 	struct fdl_slice ubwc_slices[FDL_MAX_MIP_LEVELS];
99 	uint32_t pitch0;
100 	uint32_t ubwc_width0;
101 	uint32_t layer_size;
102 	uint32_t ubwc_layer_size; /* in bytes */
103 	bool ubwc : 1;
104 	bool layer_first : 1;    /* see above description */
105 	bool tile_all : 1;
106 
107 	/* Note that for tiled textures, beyond a certain mipmap level (ie.
108 	 * when width is less than block size) things switch to linear.  In
109 	 * general you should not directly look at fdl_layout::tile_mode,
110 	 * but instead use fdl_surface::tile_mode which will correctly take
111 	 * this into account.
112 	 */
113 	uint32_t tile_mode : 2;
114 	/* Bytes per pixel (where a "pixel" is a single row of a block in the case
115 	 * of compression), including each sample in the case of multisample
116 	 * layouts.
117 	 */
118 	uint8_t cpp;
119 
120 	/**
121 	 * Left shift necessary to multiply by cpp.  Invalid for NPOT cpp, please
122 	 * use fdl_cpp_shift() to sanity check you aren't hitting that case.
123 	 */
124 	uint8_t cpp_shift;
125 
126 	uint32_t width0, height0, depth0;
127 	uint32_t nr_samples;
128 	enum pipe_format format;
129 
130 	uint32_t size; /* Size of the whole image, in bytes. */
131 	uint32_t base_align; /* Alignment of the base address, in bytes. */
132 	uint8_t pitchalign; /* log2(pitchalign) */
133 };
134 
135 static inline uint32_t
fdl_cpp_shift(const struct fdl_layout * layout)136 fdl_cpp_shift(const struct fdl_layout *layout)
137 {
138 	assert(util_is_power_of_two_or_zero(layout->cpp));
139 	return layout->cpp_shift;
140 }
141 
142 static inline uint32_t
fdl_pitch(const struct fdl_layout * layout,unsigned level)143 fdl_pitch(const struct fdl_layout *layout, unsigned level)
144 {
145 	return align(u_minify(layout->pitch0, level), 1 << layout->pitchalign);
146 }
147 
148 #define RGB_TILE_WIDTH_ALIGNMENT 64
149 #define RGB_TILE_HEIGHT_ALIGNMENT 16
150 #define UBWC_PLANE_SIZE_ALIGNMENT 4096
151 
152 static inline uint32_t
fdl_ubwc_pitch(const struct fdl_layout * layout,unsigned level)153 fdl_ubwc_pitch(const struct fdl_layout *layout, unsigned level)
154 {
155 	if (!layout->ubwc)
156 		return 0;
157 	return align(u_minify(layout->ubwc_width0, level), RGB_TILE_WIDTH_ALIGNMENT);
158 }
159 
160 static inline uint32_t
fdl_layer_stride(const struct fdl_layout * layout,unsigned level)161 fdl_layer_stride(const struct fdl_layout *layout, unsigned level)
162 {
163 	if (layout->layer_first)
164 		return layout->layer_size;
165 	else
166 		return layout->slices[level].size0;
167 }
168 
169 /* a2xx is special and needs PoT alignment for mipmaps: */
170 static inline uint32_t
fdl2_pitch(const struct fdl_layout * layout,unsigned level)171 fdl2_pitch(const struct fdl_layout *layout, unsigned level)
172 {
173 	uint32_t pitch = fdl_pitch(layout, level);
174 	if (level)
175 		pitch = util_next_power_of_two(pitch);
176 	return pitch;
177 }
178 
179 static inline uint32_t
fdl2_pitch_pixels(const struct fdl_layout * layout,unsigned level)180 fdl2_pitch_pixels(const struct fdl_layout *layout, unsigned level)
181 {
182 	return fdl2_pitch(layout, level) >> fdl_cpp_shift(layout);
183 }
184 
185 static inline uint32_t
fdl_surface_offset(const struct fdl_layout * layout,unsigned level,unsigned layer)186 fdl_surface_offset(const struct fdl_layout *layout, unsigned level, unsigned layer)
187 {
188 	const struct fdl_slice *slice = &layout->slices[level];
189 	return slice->offset + fdl_layer_stride(layout, level) * layer;
190 }
191 
192 static inline uint32_t
fdl_ubwc_offset(const struct fdl_layout * layout,unsigned level,unsigned layer)193 fdl_ubwc_offset(const struct fdl_layout *layout, unsigned level, unsigned layer)
194 {
195 	const struct fdl_slice *slice = &layout->ubwc_slices[level];
196 	return slice->offset + layer * layout->ubwc_layer_size;
197 }
198 
199 /* Minimum layout width to enable UBWC. */
200 #define FDL_MIN_UBWC_WIDTH 16
201 
202 static inline bool
fdl_level_linear(const struct fdl_layout * layout,int level)203 fdl_level_linear(const struct fdl_layout *layout, int level)
204 {
205 	if (layout->tile_all)
206 		return false;
207 
208 	unsigned w = u_minify(layout->width0, level);
209 	if (w < FDL_MIN_UBWC_WIDTH)
210 		return true;
211 
212 	return false;
213 }
214 
215 static inline uint32_t
fdl_tile_mode(const struct fdl_layout * layout,int level)216 fdl_tile_mode(const struct fdl_layout *layout, int level)
217 {
218 	if (layout->tile_mode && fdl_level_linear(layout, level))
219 		return 0; /* linear */
220 	else
221 		return layout->tile_mode;
222 }
223 
224 static inline bool
fdl_ubwc_enabled(const struct fdl_layout * layout,int level)225 fdl_ubwc_enabled(const struct fdl_layout *layout, int level)
226 {
227 	return layout->ubwc;
228 }
229 
230 void
231 fdl_layout_buffer(struct fdl_layout *layout, uint32_t size);
232 
233 void
234 fdl5_layout(struct fdl_layout *layout,
235 		enum pipe_format format, uint32_t nr_samples,
236 		uint32_t width0, uint32_t height0, uint32_t depth0,
237 		uint32_t mip_levels, uint32_t array_size, bool is_3d);
238 
239 bool
240 fdl6_layout(struct fdl_layout *layout,
241 		enum pipe_format format, uint32_t nr_samples,
242 		uint32_t width0, uint32_t height0, uint32_t depth0,
243 		uint32_t mip_levels, uint32_t array_size, bool is_3d,
244 		struct fdl_explicit_layout *plane_layout);
245 
246 static inline void
fdl_set_pitchalign(struct fdl_layout * layout,unsigned pitchalign)247 fdl_set_pitchalign(struct fdl_layout *layout, unsigned pitchalign)
248 {
249 	uint32_t nblocksx = util_format_get_nblocksx(layout->format, layout->width0);
250 	layout->pitchalign = pitchalign;
251 	layout->pitch0 = align(nblocksx * layout->cpp, 1 << pitchalign);
252 }
253 
254 void
255 fdl_dump_layout(struct fdl_layout *layout);
256 
257 void
258 fdl6_get_ubwc_blockwidth(struct fdl_layout *layout,
259 		uint32_t *blockwidth, uint32_t *blockheight);
260 
261 #endif /* FREEDRENO_LAYOUT_H_ */
262