1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef GEN_GEM_H
25 #define GEN_GEM_H
26
27 #include <errno.h>
28 #include <stdbool.h>
29 #include <stdint.h>
30 #include <unistd.h>
31 #include <sys/ioctl.h>
32
33 static inline uint64_t
gen_canonical_address(uint64_t v)34 gen_canonical_address(uint64_t v)
35 {
36 /* From the Broadwell PRM Vol. 2a, MI_LOAD_REGISTER_MEM::MemoryAddress:
37 *
38 * "This field specifies the address of the memory location where the
39 * register value specified in the DWord above will read from. The
40 * address specifies the DWord location of the data. Range =
41 * GraphicsVirtualAddress[63:2] for a DWord register GraphicsAddress
42 * [63:48] are ignored by the HW and assumed to be in correct
43 * canonical form [63:48] == [47]."
44 */
45 const int shift = 63 - 47;
46 return (int64_t)(v << shift) >> shift;
47 }
48
49 /**
50 * This returns a 48-bit address with the high 16 bits zeroed.
51 *
52 * It's the opposite of gen_canonicalize_address.
53 */
54 static inline uint64_t
gen_48b_address(uint64_t v)55 gen_48b_address(uint64_t v)
56 {
57 const int shift = 63 - 47;
58 return (uint64_t)(v << shift) >> shift;
59 }
60
61 /**
62 * Call ioctl, restarting if it is interupted
63 */
64 static inline int
gen_ioctl(int fd,unsigned long request,void * arg)65 gen_ioctl(int fd, unsigned long request, void *arg)
66 {
67 int ret;
68
69 do {
70 ret = ioctl(fd, request, arg);
71 } while (ret == -1 && (errno == EINTR || errno == EAGAIN));
72 return ret;
73 }
74
75 bool gen_gem_supports_syncobj_wait(int fd);
76
77 #endif /* GEN_GEM_H */
78