1 //===- StackMaps.h - StackMaps ----------------------------------*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #ifndef LLVM_CODEGEN_STACKMAPS_H 10 #define LLVM_CODEGEN_STACKMAPS_H 11 12 #include "llvm/ADT/MapVector.h" 13 #include "llvm/ADT/SmallVector.h" 14 #include "llvm/CodeGen/MachineInstr.h" 15 #include "llvm/IR/CallingConv.h" 16 #include "llvm/MC/MCSymbol.h" 17 #include "llvm/Support/Debug.h" 18 #include <algorithm> 19 #include <cassert> 20 #include <cstdint> 21 #include <vector> 22 23 namespace llvm { 24 25 class AsmPrinter; 26 class MCExpr; 27 class MCStreamer; 28 class raw_ostream; 29 class TargetRegisterInfo; 30 31 /// MI-level stackmap operands. 32 /// 33 /// MI stackmap operations take the form: 34 /// <id>, <numBytes>, live args... 35 class StackMapOpers { 36 public: 37 /// Enumerate the meta operands. 38 enum { IDPos, NBytesPos }; 39 40 private: 41 const MachineInstr* MI; 42 43 public: 44 explicit StackMapOpers(const MachineInstr *MI); 45 46 /// Return the ID for the given stackmap getID()47 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); } 48 49 /// Return the number of patchable bytes the given stackmap should emit. getNumPatchBytes()50 uint32_t getNumPatchBytes() const { 51 return MI->getOperand(NBytesPos).getImm(); 52 } 53 54 /// Get the operand index of the variable list of non-argument operands. 55 /// These hold the "live state". getVarIdx()56 unsigned getVarIdx() const { 57 // Skip ID, nShadowBytes. 58 return 2; 59 } 60 }; 61 62 /// MI-level patchpoint operands. 63 /// 64 /// MI patchpoint operations take the form: 65 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ... 66 /// 67 /// IR patchpoint intrinsics do not have the <cc> operand because calling 68 /// convention is part of the subclass data. 69 /// 70 /// SD patchpoint nodes do not have a def operand because it is part of the 71 /// SDValue. 72 /// 73 /// Patchpoints following the anyregcc convention are handled specially. For 74 /// these, the stack map also records the location of the return value and 75 /// arguments. 76 class PatchPointOpers { 77 public: 78 /// Enumerate the meta operands. 79 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd }; 80 81 private: 82 const MachineInstr *MI; 83 bool HasDef; 84 85 unsigned getMetaIdx(unsigned Pos = 0) const { 86 assert(Pos < MetaEnd && "Meta operand index out of range."); 87 return (HasDef ? 1 : 0) + Pos; 88 } 89 getMetaOper(unsigned Pos)90 const MachineOperand &getMetaOper(unsigned Pos) const { 91 return MI->getOperand(getMetaIdx(Pos)); 92 } 93 94 public: 95 explicit PatchPointOpers(const MachineInstr *MI); 96 isAnyReg()97 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); } hasDef()98 bool hasDef() const { return HasDef; } 99 100 /// Return the ID for the given patchpoint. getID()101 uint64_t getID() const { return getMetaOper(IDPos).getImm(); } 102 103 /// Return the number of patchable bytes the given patchpoint should emit. getNumPatchBytes()104 uint32_t getNumPatchBytes() const { 105 return getMetaOper(NBytesPos).getImm(); 106 } 107 108 /// Returns the target of the underlying call. getCallTarget()109 const MachineOperand &getCallTarget() const { 110 return getMetaOper(TargetPos); 111 } 112 113 /// Returns the calling convention getCallingConv()114 CallingConv::ID getCallingConv() const { 115 return getMetaOper(CCPos).getImm(); 116 } 117 getArgIdx()118 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; } 119 120 /// Return the number of call arguments getNumCallArgs()121 uint32_t getNumCallArgs() const { 122 return MI->getOperand(getMetaIdx(NArgPos)).getImm(); 123 } 124 125 /// Get the operand index of the variable list of non-argument operands. 126 /// These hold the "live state". getVarIdx()127 unsigned getVarIdx() const { 128 return getMetaIdx() + MetaEnd + getNumCallArgs(); 129 } 130 131 /// Get the index at which stack map locations will be recorded. 132 /// Arguments are not recorded unless the anyregcc convention is used. getStackMapStartIdx()133 unsigned getStackMapStartIdx() const { 134 if (isAnyReg()) 135 return getArgIdx(); 136 return getVarIdx(); 137 } 138 139 /// Get the next scratch register operand index. 140 unsigned getNextScratchIdx(unsigned StartIdx = 0) const; 141 }; 142 143 /// MI-level Statepoint operands 144 /// 145 /// Statepoint operands take the form: 146 /// <id>, <num patch bytes >, <num call arguments>, <call target>, 147 /// [call arguments...], 148 /// <StackMaps::ConstantOp>, <calling convention>, 149 /// <StackMaps::ConstantOp>, <statepoint flags>, 150 /// <StackMaps::ConstantOp>, <num deopt args>, [deopt args...], 151 /// <StackMaps::ConstantOp>, <num gc pointer args>, [gc pointer args...], 152 /// <StackMaps::ConstantOp>, <num gc allocas>, [gc allocas args...], 153 /// <StackMaps::ConstantOp>, <num entries in gc map>, [base/derived pairs] 154 /// base/derived pairs in gc map are logical indices into <gc pointer args> 155 /// section. 156 /// All gc pointers assigned to VRegs produce new value (in form of MI Def 157 /// operand) and are tied to it. 158 class StatepointOpers { 159 // TODO:: we should change the STATEPOINT representation so that CC and 160 // Flags should be part of meta operands, with args and deopt operands, and 161 // gc operands all prefixed by their length and a type code. This would be 162 // much more consistent. 163 164 // These values are absolute offsets into the operands of the statepoint 165 // instruction. 166 enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd }; 167 168 // These values are relative offsets from the start of the statepoint meta 169 // arguments (i.e. the end of the call arguments). 170 enum { CCOffset = 1, FlagsOffset = 3, NumDeoptOperandsOffset = 5 }; 171 172 public: StatepointOpers(const MachineInstr * MI)173 explicit StatepointOpers(const MachineInstr *MI) : MI(MI) { 174 NumDefs = MI->getNumDefs(); 175 } 176 177 /// Get index of statepoint ID operand. getIDPos()178 unsigned getIDPos() const { return NumDefs + IDPos; } 179 180 /// Get index of Num Patch Bytes operand. getNBytesPos()181 unsigned getNBytesPos() const { return NumDefs + NBytesPos; } 182 183 /// Get index of Num Call Arguments operand. getNCallArgsPos()184 unsigned getNCallArgsPos() const { return NumDefs + NCallArgsPos; } 185 186 /// Get starting index of non call related arguments 187 /// (calling convention, statepoint flags, vm state and gc state). getVarIdx()188 unsigned getVarIdx() const { 189 return MI->getOperand(NumDefs + NCallArgsPos).getImm() + MetaEnd + NumDefs; 190 } 191 192 /// Get index of Calling Convention operand. getCCIdx()193 unsigned getCCIdx() const { return getVarIdx() + CCOffset; } 194 195 /// Get index of Flags operand. getFlagsIdx()196 unsigned getFlagsIdx() const { return getVarIdx() + FlagsOffset; } 197 198 /// Get index of Number Deopt Arguments operand. getNumDeoptArgsIdx()199 unsigned getNumDeoptArgsIdx() const { 200 return getVarIdx() + NumDeoptOperandsOffset; 201 } 202 203 /// Return the ID for the given statepoint. getID()204 uint64_t getID() const { return MI->getOperand(NumDefs + IDPos).getImm(); } 205 206 /// Return the number of patchable bytes the given statepoint should emit. getNumPatchBytes()207 uint32_t getNumPatchBytes() const { 208 return MI->getOperand(NumDefs + NBytesPos).getImm(); 209 } 210 211 /// Return the target of the underlying call. getCallTarget()212 const MachineOperand &getCallTarget() const { 213 return MI->getOperand(NumDefs + CallTargetPos); 214 } 215 216 /// Return the calling convention. getCallingConv()217 CallingConv::ID getCallingConv() const { 218 return MI->getOperand(getCCIdx()).getImm(); 219 } 220 221 /// Return the statepoint flags. getFlags()222 uint64_t getFlags() const { return MI->getOperand(getFlagsIdx()).getImm(); } 223 getNumDeoptArgs()224 uint64_t getNumDeoptArgs() const { 225 return MI->getOperand(getNumDeoptArgsIdx()).getImm(); 226 } 227 228 /// Get index of first GC pointer operand of -1 if there are none. 229 int getFirstGCPtrIdx(); 230 231 /// Get vector of base/derived pairs from statepoint. 232 /// Elements are indices into GC Pointer operand list (logical). 233 /// Returns number of elements in GCMap. 234 unsigned 235 getGCPointerMap(SmallVectorImpl<std::pair<unsigned, unsigned>> &GCMap); 236 237 private: 238 const MachineInstr *MI; 239 unsigned NumDefs; 240 }; 241 242 class StackMaps { 243 public: 244 struct Location { 245 enum LocationType { 246 Unprocessed, 247 Register, 248 Direct, 249 Indirect, 250 Constant, 251 ConstantIndex 252 }; 253 LocationType Type = Unprocessed; 254 unsigned Size = 0; 255 unsigned Reg = 0; 256 int64_t Offset = 0; 257 258 Location() = default; LocationLocation259 Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset) 260 : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {} 261 }; 262 263 struct LiveOutReg { 264 unsigned short Reg = 0; 265 unsigned short DwarfRegNum = 0; 266 unsigned short Size = 0; 267 268 LiveOutReg() = default; LiveOutRegLiveOutReg269 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum, 270 unsigned short Size) 271 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {} 272 }; 273 274 // OpTypes are used to encode information about the following logical 275 // operand (which may consist of several MachineOperands) for the 276 // OpParser. 277 using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp }; 278 279 StackMaps(AsmPrinter &AP); 280 281 /// Get index of next meta operand. 282 /// Similar to parseOperand, but does not actually parses operand meaning. 283 static unsigned getNextMetaArgIdx(const MachineInstr *MI, unsigned CurIdx); 284 reset()285 void reset() { 286 CSInfos.clear(); 287 ConstPool.clear(); 288 FnInfos.clear(); 289 } 290 291 using LocationVec = SmallVector<Location, 8>; 292 using LiveOutVec = SmallVector<LiveOutReg, 8>; 293 using ConstantPool = MapVector<uint64_t, uint64_t>; 294 295 struct FunctionInfo { 296 uint64_t StackSize = 0; 297 uint64_t RecordCount = 1; 298 299 FunctionInfo() = default; FunctionInfoFunctionInfo300 explicit FunctionInfo(uint64_t StackSize) : StackSize(StackSize) {} 301 }; 302 303 struct CallsiteInfo { 304 const MCExpr *CSOffsetExpr = nullptr; 305 uint64_t ID = 0; 306 LocationVec Locations; 307 LiveOutVec LiveOuts; 308 309 CallsiteInfo() = default; CallsiteInfoCallsiteInfo310 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID, 311 LocationVec &&Locations, LiveOutVec &&LiveOuts) 312 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)), 313 LiveOuts(std::move(LiveOuts)) {} 314 }; 315 316 using FnInfoMap = MapVector<const MCSymbol *, FunctionInfo>; 317 using CallsiteInfoList = std::vector<CallsiteInfo>; 318 319 /// Generate a stackmap record for a stackmap instruction. 320 /// 321 /// MI must be a raw STACKMAP, not a PATCHPOINT. 322 void recordStackMap(const MCSymbol &L, 323 const MachineInstr &MI); 324 325 /// Generate a stackmap record for a patchpoint instruction. 326 void recordPatchPoint(const MCSymbol &L, 327 const MachineInstr &MI); 328 329 /// Generate a stackmap record for a statepoint instruction. 330 void recordStatepoint(const MCSymbol &L, 331 const MachineInstr &MI); 332 333 /// If there is any stack map data, create a stack map section and serialize 334 /// the map info into it. This clears the stack map data structures 335 /// afterwards. 336 void serializeToStackMapSection(); 337 338 /// Get call site info. getCSInfos()339 CallsiteInfoList &getCSInfos() { return CSInfos; } 340 341 /// Get function info. getFnInfos()342 FnInfoMap &getFnInfos() { return FnInfos; } 343 344 private: 345 static const char *WSMP; 346 347 AsmPrinter &AP; 348 CallsiteInfoList CSInfos; 349 ConstantPool ConstPool; 350 FnInfoMap FnInfos; 351 352 MachineInstr::const_mop_iterator 353 parseOperand(MachineInstr::const_mop_iterator MOI, 354 MachineInstr::const_mop_iterator MOE, LocationVec &Locs, 355 LiveOutVec &LiveOuts) const; 356 357 /// Specialized parser of statepoint operands. 358 /// They do not directly correspond to StackMap record entries. 359 void parseStatepointOpers(const MachineInstr &MI, 360 MachineInstr::const_mop_iterator MOI, 361 MachineInstr::const_mop_iterator MOE, 362 LocationVec &Locations, LiveOutVec &LiveOuts); 363 364 /// Create a live-out register record for the given register @p Reg. 365 LiveOutReg createLiveOutReg(unsigned Reg, 366 const TargetRegisterInfo *TRI) const; 367 368 /// Parse the register live-out mask and return a vector of live-out 369 /// registers that need to be recorded in the stackmap. 370 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const; 371 372 /// Record the locations of the operands of the provided instruction in a 373 /// record keyed by the provided label. For instructions w/AnyReg calling 374 /// convention the return register is also recorded if requested. For 375 /// STACKMAP, and PATCHPOINT the label is expected to immediately *preceed* 376 /// lowering of the MI to MCInsts. For STATEPOINT, it expected to 377 /// immediately *follow*. It's not clear this difference was intentional, 378 /// but it exists today. 379 void recordStackMapOpers(const MCSymbol &L, 380 const MachineInstr &MI, uint64_t ID, 381 MachineInstr::const_mop_iterator MOI, 382 MachineInstr::const_mop_iterator MOE, 383 bool recordResult = false); 384 385 /// Emit the stackmap header. 386 void emitStackmapHeader(MCStreamer &OS); 387 388 /// Emit the function frame record for each function. 389 void emitFunctionFrameRecords(MCStreamer &OS); 390 391 /// Emit the constant pool. 392 void emitConstantPoolEntries(MCStreamer &OS); 393 394 /// Emit the callsite info for each stackmap/patchpoint intrinsic call. 395 void emitCallsiteEntries(MCStreamer &OS); 396 397 void print(raw_ostream &OS); debug()398 void debug() { print(dbgs()); } 399 }; 400 401 } // end namespace llvm 402 403 #endif // LLVM_CODEGEN_STACKMAPS_H 404