1 /* Capstone testing regression */
2 /* By Do Minh Tuan <tuanit96@gmail.com>, 02-2019 */
3
4
5 #include "factory.h"
6
7 static const char* s_addressing_modes[] = {
8 "<invalid mode>",
9
10 "Register Direct - Data",
11 "Register Direct - Address",
12
13 "Register Indirect - Address",
14 "Register Indirect - Address with Postincrement",
15 "Register Indirect - Address with Predecrement",
16 "Register Indirect - Address with Displacement",
17
18 "Address Register Indirect With Index - 8-bit displacement",
19 "Address Register Indirect With Index - Base displacement",
20
21 "Memory indirect - Postindex",
22 "Memory indirect - Preindex",
23
24 "Program Counter Indirect - with Displacement",
25
26 "Program Counter Indirect with Index - with 8-Bit Displacement",
27 "Program Counter Indirect with Index - with Base Displacement",
28
29 "Program Counter Memory Indirect - Postindexed",
30 "Program Counter Memory Indirect - Preindexed",
31
32 "Absolute Data Addressing - Short",
33 "Absolute Data Addressing - Long",
34 "Immediate value",
35 };
36
print_read_write_regs(char * result,cs_detail * detail,csh * handle)37 static void print_read_write_regs(char *result, cs_detail* detail, csh *handle)
38 {
39 int i;
40
41 for (i = 0; i < detail->regs_read_count; ++i) {
42 uint16_t reg_id = detail->regs_read[i];
43 const char* reg_name = cs_reg_name(*handle, reg_id);
44 add_str(&result, " ; reading from reg: %s", reg_name);
45 }
46
47 for (i = 0; i < detail->regs_write_count; ++i) {
48 uint16_t reg_id = detail->regs_write[i];
49 const char* reg_name = cs_reg_name(*handle, reg_id);
50 add_str(&result, " ; writing to reg: %s", reg_name);
51 }
52 }
53
get_detail_m68k(csh * handle,cs_mode mode,cs_insn * ins)54 char *get_detail_m68k(csh *handle, cs_mode mode, cs_insn *ins)
55 {
56 cs_m68k* m68k;
57 cs_detail* detail;
58 int i;
59 char *result;
60
61 result = (char *)malloc(sizeof(char));
62 result[0] = '\0';
63
64 if (ins->detail == NULL)
65 return result;
66
67
68 detail = ins->detail;
69 m68k = &detail->m68k;
70 if (m68k->op_count)
71 add_str(&result, " ; op_count: %u", m68k->op_count);
72
73 print_read_write_regs(result, detail, handle);
74
75 add_str(&result, " ; groups_count: %u", detail->groups_count);
76
77 for (i = 0; i < m68k->op_count; i++) {
78 cs_m68k_op* op = &(m68k->operands[i]);
79
80 switch((int)op->type) {
81 default:
82 break;
83 case M68K_OP_REG:
84 add_str(&result, " ; operands[%u].type: REG = %s", i, cs_reg_name(*handle, op->reg));
85 break;
86 case M68K_OP_IMM:
87 add_str(&result, " ; operands[%u].type: IMM = 0x%x", i, (int)op->imm);
88 break;
89 case M68K_OP_MEM:
90 add_str(&result, " ; operands[%u].type: MEM", i);
91 if (op->mem.base_reg != M68K_REG_INVALID)
92 add_str(&result, " ; operands[%u].mem.base: REG = %s", i, cs_reg_name(*handle, op->mem.base_reg));
93 if (op->mem.index_reg != M68K_REG_INVALID) {
94 add_str(&result, " ; operands[%u].mem.index: REG = %s", i, cs_reg_name(*handle, op->mem.index_reg));
95 add_str(&result, " ; operands[%u].mem.index: size = %c", i, op->mem.index_size ? 'l' : 'w');
96 }
97 if (op->mem.disp != 0)
98 add_str(&result, " ; operands[%u].mem.disp: 0x%x", i, op->mem.disp);
99 if (op->mem.scale != 0)
100 add_str(&result, " ; operands[%u].mem.scale: %d", i, op->mem.scale);
101
102 add_str(&result, " ; address mode: %s", s_addressing_modes[op->address_mode]);
103 break;
104 case M68K_OP_FP_SINGLE:
105 add_str(&result, " ; operands[%u].type: FP_SINGLE", i);
106 add_str(&result, " ; operands[%u].simm: %f", i, op->simm);
107 break;
108 case M68K_OP_FP_DOUBLE:
109 add_str(&result, " ; operands[%u].type: FP_DOUBLE", i);
110 add_str(&result, " ; operands[%u].dimm: %lf", i, op->dimm);
111 break;
112 }
113 }
114
115 return result;
116 }
117