1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "draw/draw_context.h"
30 #include "util/os_misc.h"
31 #include "util/format/u_format.h"
32 #include "util/format/u_format_s3tc.h"
33 #include "util/u_inlines.h"
34 #include "util/u_memory.h"
35 #include "util/u_screen.h"
36 #include "util/u_string.h"
37
38 #include "i915_reg.h"
39 #include "i915_debug.h"
40 #include "i915_context.h"
41 #include "i915_screen.h"
42 #include "i915_resource.h"
43 #include "i915_winsys.h"
44 #include "i915_public.h"
45
46
47 /*
48 * Probe functions
49 */
50
51
52 static const char *
i915_get_vendor(struct pipe_screen * screen)53 i915_get_vendor(struct pipe_screen *screen)
54 {
55 return "Mesa Project";
56 }
57
58 static const char *
i915_get_device_vendor(struct pipe_screen * screen)59 i915_get_device_vendor(struct pipe_screen *screen)
60 {
61 return "Intel";
62 }
63
64 static const char *
i915_get_name(struct pipe_screen * screen)65 i915_get_name(struct pipe_screen *screen)
66 {
67 static char buffer[128];
68 const char *chipset;
69
70 switch (i915_screen(screen)->iws->pci_id) {
71 case PCI_CHIP_I915_G:
72 chipset = "915G";
73 break;
74 case PCI_CHIP_I915_GM:
75 chipset = "915GM";
76 break;
77 case PCI_CHIP_I945_G:
78 chipset = "945G";
79 break;
80 case PCI_CHIP_I945_GM:
81 chipset = "945GM";
82 break;
83 case PCI_CHIP_I945_GME:
84 chipset = "945GME";
85 break;
86 case PCI_CHIP_G33_G:
87 chipset = "G33";
88 break;
89 case PCI_CHIP_Q35_G:
90 chipset = "Q35";
91 break;
92 case PCI_CHIP_Q33_G:
93 chipset = "Q33";
94 break;
95 case PCI_CHIP_PINEVIEW_G:
96 chipset = "Pineview G";
97 break;
98 case PCI_CHIP_PINEVIEW_M:
99 chipset = "Pineview M";
100 break;
101 default:
102 chipset = "unknown";
103 break;
104 }
105
106 snprintf(buffer, sizeof(buffer), "i915 (chipset: %s)", chipset);
107 return buffer;
108 }
109
110 static int
i915_get_shader_param(struct pipe_screen * screen,enum pipe_shader_type shader,enum pipe_shader_cap cap)111 i915_get_shader_param(struct pipe_screen *screen,
112 enum pipe_shader_type shader,
113 enum pipe_shader_cap cap)
114 {
115 switch(shader) {
116 case PIPE_SHADER_VERTEX:
117 switch (cap) {
118 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
119 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
120 if (debug_get_bool_option("DRAW_USE_LLVM", TRUE))
121 return PIPE_MAX_SAMPLERS;
122 else
123 return 0;
124 default:
125 return draw_get_shader_param(shader, cap);
126 }
127 case PIPE_SHADER_FRAGMENT:
128 /* XXX: some of these are just shader model 2.0 values, fix this! */
129 switch(cap) {
130 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
131 return I915_MAX_ALU_INSN + I915_MAX_TEX_INSN;
132 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
133 return I915_MAX_ALU_INSN;
134 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
135 return I915_MAX_TEX_INSN;
136 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
137 return 8;
138 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
139 return 0;
140 case PIPE_SHADER_CAP_MAX_INPUTS:
141 return 10;
142 case PIPE_SHADER_CAP_MAX_OUTPUTS:
143 return 1;
144 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
145 return 32 * sizeof(float[4]);
146 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
147 return 1;
148 case PIPE_SHADER_CAP_MAX_TEMPS:
149 return 12; /* XXX: 12 -> 32 ? */
150 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
151 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
152 return 0;
153 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
154 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
155 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
156 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
157 return 1;
158 case PIPE_SHADER_CAP_SUBROUTINES:
159 return 0;
160 case PIPE_SHADER_CAP_INTEGERS:
161 case PIPE_SHADER_CAP_INT64_ATOMICS:
162 case PIPE_SHADER_CAP_FP16:
163 case PIPE_SHADER_CAP_FP16_DERIVATIVES:
164 case PIPE_SHADER_CAP_INT16:
165 case PIPE_SHADER_CAP_GLSL_16BIT_CONSTS:
166 return 0;
167 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
168 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
169 return I915_TEX_UNITS;
170 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
171 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
172 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
173 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
174 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
175 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
176 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
177 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
178 case PIPE_SHADER_CAP_PREFERRED_IR:
179 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
180 return 0;
181 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
182 return 32;
183 default:
184 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
185 return 0;
186 }
187 break;
188 default:
189 return 0;
190 }
191
192 }
193
194 static int
i915_get_param(struct pipe_screen * screen,enum pipe_cap cap)195 i915_get_param(struct pipe_screen *screen, enum pipe_cap cap)
196 {
197 struct i915_screen *is = i915_screen(screen);
198
199 switch (cap) {
200 /* Supported features (boolean caps). */
201 case PIPE_CAP_ANISOTROPIC_FILTER:
202 case PIPE_CAP_NPOT_TEXTURES:
203 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
204 case PIPE_CAP_POINT_SPRITE:
205 case PIPE_CAP_PRIMITIVE_RESTART: /* draw module */
206 case PIPE_CAP_PRIMITIVE_RESTART_FIXED_INDEX:
207 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
208 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
209 case PIPE_CAP_TGSI_INSTANCEID:
210 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
211 case PIPE_CAP_USER_VERTEX_BUFFERS:
212 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
213 return 1;
214
215 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
216 case PIPE_CAP_PCI_GROUP:
217 case PIPE_CAP_PCI_BUS:
218 case PIPE_CAP_PCI_DEVICE:
219 case PIPE_CAP_PCI_FUNCTION:
220 return 0;
221
222 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
223 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
224 return 0;
225
226 case PIPE_CAP_MAX_GS_INVOCATIONS:
227 return 32;
228
229 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
230 return 1 << 27;
231
232 case PIPE_CAP_MAX_VIEWPORTS:
233 return 1;
234
235 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
236 return 64;
237
238 case PIPE_CAP_GLSL_FEATURE_LEVEL:
239 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
240 return 120;
241
242 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
243 return 16;
244
245 /* Features we can lie about (boolean caps). */
246 case PIPE_CAP_OCCLUSION_QUERY:
247 return is->debug.lie ? 1 : 0;
248
249 /* Texturing. */
250 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
251 return 1 << (I915_MAX_TEXTURE_2D_LEVELS - 1);
252 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
253 return I915_MAX_TEXTURE_3D_LEVELS;
254 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
255 return 1 << (I915_MAX_TEXTURE_2D_LEVELS - 1);
256
257 /* Render targets. */
258 case PIPE_CAP_MAX_RENDER_TARGETS:
259 return 1;
260
261 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
262 return 2048;
263
264 /* Fragment coordinate conventions. */
265 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
266 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
267 return 1;
268 case PIPE_CAP_ENDIANNESS:
269 return PIPE_ENDIAN_LITTLE;
270 case PIPE_CAP_MAX_VARYINGS:
271 return 10;
272
273 case PIPE_CAP_VENDOR_ID:
274 return 0x8086;
275 case PIPE_CAP_DEVICE_ID:
276 return is->iws->pci_id;
277 case PIPE_CAP_ACCELERATED:
278 return 1;
279 case PIPE_CAP_VIDEO_MEMORY: {
280 /* Once a batch uses more than 75% of the maximum mappable size, we
281 * assume that there's some fragmentation, and we start doing extra
282 * flushing, etc. That's the big cliff apps will care about.
283 */
284 const int gpu_mappable_megabytes = is->iws->aperture_size(is->iws) * 3 / 4;
285 uint64_t system_memory;
286
287 if (!os_get_total_physical_memory(&system_memory))
288 return 0;
289
290 return MIN2(gpu_mappable_megabytes, (int)(system_memory >> 20));
291 }
292 case PIPE_CAP_UMA:
293 return 1;
294
295 default:
296 return u_pipe_screen_get_param_defaults(screen, cap);
297 }
298 }
299
300 static float
i915_get_paramf(struct pipe_screen * screen,enum pipe_capf cap)301 i915_get_paramf(struct pipe_screen *screen, enum pipe_capf cap)
302 {
303 switch(cap) {
304 case PIPE_CAPF_MAX_LINE_WIDTH:
305 /* fall-through */
306 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
307 return 7.5;
308
309 case PIPE_CAPF_MAX_POINT_WIDTH:
310 /* fall-through */
311 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
312 return 255.0;
313
314 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
315 return 4.0;
316
317 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
318 return 16.0;
319
320 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
321 /* fall-through */
322 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
323 /* fall-through */
324 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
325 return 0.0f;
326
327 default:
328 debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
329 return 0;
330 }
331 }
332
333 bool
i915_is_format_supported(struct pipe_screen * screen,enum pipe_format format,enum pipe_texture_target target,unsigned sample_count,unsigned storage_sample_count,unsigned tex_usage)334 i915_is_format_supported(struct pipe_screen *screen,
335 enum pipe_format format,
336 enum pipe_texture_target target,
337 unsigned sample_count,
338 unsigned storage_sample_count,
339 unsigned tex_usage)
340 {
341 static const enum pipe_format tex_supported[] = {
342 PIPE_FORMAT_B8G8R8A8_UNORM,
343 PIPE_FORMAT_B8G8R8A8_SRGB,
344 PIPE_FORMAT_B8G8R8X8_UNORM,
345 PIPE_FORMAT_R8G8B8A8_UNORM,
346 PIPE_FORMAT_R8G8B8X8_UNORM,
347 PIPE_FORMAT_B4G4R4A4_UNORM,
348 PIPE_FORMAT_B5G6R5_UNORM,
349 PIPE_FORMAT_B5G5R5A1_UNORM,
350 PIPE_FORMAT_B10G10R10A2_UNORM,
351 PIPE_FORMAT_L8_UNORM,
352 PIPE_FORMAT_A8_UNORM,
353 PIPE_FORMAT_I8_UNORM,
354 PIPE_FORMAT_L8A8_UNORM,
355 PIPE_FORMAT_UYVY,
356 PIPE_FORMAT_YUYV,
357 /* XXX why not?
358 PIPE_FORMAT_Z16_UNORM, */
359 PIPE_FORMAT_DXT1_RGB,
360 PIPE_FORMAT_DXT1_RGBA,
361 PIPE_FORMAT_DXT3_RGBA,
362 PIPE_FORMAT_DXT5_RGBA,
363 PIPE_FORMAT_Z24X8_UNORM,
364 PIPE_FORMAT_Z24_UNORM_S8_UINT,
365 PIPE_FORMAT_NONE /* list terminator */
366 };
367 static const enum pipe_format render_supported[] = {
368 PIPE_FORMAT_B8G8R8A8_UNORM,
369 PIPE_FORMAT_B8G8R8X8_UNORM,
370 PIPE_FORMAT_R8G8B8A8_UNORM,
371 PIPE_FORMAT_R8G8B8X8_UNORM,
372 PIPE_FORMAT_B5G6R5_UNORM,
373 PIPE_FORMAT_B5G5R5A1_UNORM,
374 PIPE_FORMAT_B4G4R4A4_UNORM,
375 PIPE_FORMAT_B10G10R10A2_UNORM,
376 PIPE_FORMAT_L8_UNORM,
377 PIPE_FORMAT_A8_UNORM,
378 PIPE_FORMAT_I8_UNORM,
379 PIPE_FORMAT_NONE /* list terminator */
380 };
381 static const enum pipe_format depth_supported[] = {
382 /* XXX why not?
383 PIPE_FORMAT_Z16_UNORM, */
384 PIPE_FORMAT_Z24X8_UNORM,
385 PIPE_FORMAT_Z24_UNORM_S8_UINT,
386 PIPE_FORMAT_NONE /* list terminator */
387 };
388 const enum pipe_format *list;
389 uint i;
390
391 if (sample_count > 1)
392 return false;
393
394 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
395 return false;
396
397 if(tex_usage & PIPE_BIND_DEPTH_STENCIL)
398 list = depth_supported;
399 else if (tex_usage & PIPE_BIND_RENDER_TARGET)
400 list = render_supported;
401 else if (tex_usage & PIPE_BIND_SAMPLER_VIEW)
402 list = tex_supported;
403 else
404 return true; /* PIPE_BIND_{VERTEX,INDEX}_BUFFER */
405
406 for (i = 0; list[i] != PIPE_FORMAT_NONE; i++) {
407 if (list[i] == format)
408 return true;
409 }
410
411 return false;
412 }
413
414
415 /*
416 * Fence functions
417 */
418
419
420 static void
i915_fence_reference(struct pipe_screen * screen,struct pipe_fence_handle ** ptr,struct pipe_fence_handle * fence)421 i915_fence_reference(struct pipe_screen *screen,
422 struct pipe_fence_handle **ptr,
423 struct pipe_fence_handle *fence)
424 {
425 struct i915_screen *is = i915_screen(screen);
426
427 is->iws->fence_reference(is->iws, ptr, fence);
428 }
429
430 static bool
i915_fence_finish(struct pipe_screen * screen,struct pipe_context * ctx,struct pipe_fence_handle * fence,uint64_t timeout)431 i915_fence_finish(struct pipe_screen *screen,
432 struct pipe_context *ctx,
433 struct pipe_fence_handle *fence,
434 uint64_t timeout)
435 {
436 struct i915_screen *is = i915_screen(screen);
437
438 if (!timeout)
439 return is->iws->fence_signalled(is->iws, fence) == 1;
440
441 return is->iws->fence_finish(is->iws, fence) == 1;
442 }
443
444
445 /*
446 * Generic functions
447 */
448
449
450 static void
i915_flush_frontbuffer(struct pipe_screen * screen,struct pipe_resource * resource,unsigned level,unsigned layer,void * winsys_drawable_handle,struct pipe_box * sub_box)451 i915_flush_frontbuffer(struct pipe_screen *screen,
452 struct pipe_resource *resource,
453 unsigned level, unsigned layer,
454 void *winsys_drawable_handle,
455 struct pipe_box *sub_box)
456 {
457 /* XXX: Dummy right now. */
458 (void)screen;
459 (void)resource;
460 (void)level;
461 (void)layer;
462 (void)winsys_drawable_handle;
463 (void)sub_box;
464 }
465
466 static void
i915_destroy_screen(struct pipe_screen * screen)467 i915_destroy_screen(struct pipe_screen *screen)
468 {
469 struct i915_screen *is = i915_screen(screen);
470
471 if (is->iws)
472 is->iws->destroy(is->iws);
473
474 FREE(is);
475 }
476
477 /**
478 * Create a new i915_screen object
479 */
480 struct pipe_screen *
i915_screen_create(struct i915_winsys * iws)481 i915_screen_create(struct i915_winsys *iws)
482 {
483 struct i915_screen *is = CALLOC_STRUCT(i915_screen);
484
485 if (!is)
486 return NULL;
487
488 switch (iws->pci_id) {
489 case PCI_CHIP_I915_G:
490 case PCI_CHIP_I915_GM:
491 is->is_i945 = FALSE;
492 break;
493
494 case PCI_CHIP_I945_G:
495 case PCI_CHIP_I945_GM:
496 case PCI_CHIP_I945_GME:
497 case PCI_CHIP_G33_G:
498 case PCI_CHIP_Q33_G:
499 case PCI_CHIP_Q35_G:
500 case PCI_CHIP_PINEVIEW_G:
501 case PCI_CHIP_PINEVIEW_M:
502 is->is_i945 = TRUE;
503 break;
504
505 default:
506 debug_printf("%s: unknown pci id 0x%x, cannot create screen\n",
507 __FUNCTION__, iws->pci_id);
508 FREE(is);
509 return NULL;
510 }
511
512 is->iws = iws;
513
514 is->base.destroy = i915_destroy_screen;
515 is->base.flush_frontbuffer = i915_flush_frontbuffer;
516
517 is->base.get_name = i915_get_name;
518 is->base.get_vendor = i915_get_vendor;
519 is->base.get_device_vendor = i915_get_device_vendor;
520 is->base.get_param = i915_get_param;
521 is->base.get_shader_param = i915_get_shader_param;
522 is->base.get_paramf = i915_get_paramf;
523 is->base.is_format_supported = i915_is_format_supported;
524
525 is->base.context_create = i915_create_context;
526
527 is->base.fence_reference = i915_fence_reference;
528 is->base.fence_finish = i915_fence_finish;
529
530 i915_init_screen_resource_functions(is);
531
532 i915_debug_init(is);
533
534 return &is->base;
535 }
536