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1 /******************************************************************************
2  *                                                                            *
3  * Copyright (C) 2018 The Android Open Source Project
4  *
5  * Licensed under the Apache License, Version 2.0 (the "License");
6  * you may not use this file except in compliance with the License.
7  * You may obtain a copy of the License at:
8  *
9  * http://www.apache.org/licenses/LICENSE-2.0
10  *
11  * Unless required by applicable law or agreed to in writing, software
12  * distributed under the License is distributed on an "AS IS" BASIS,
13  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14  * See the License for the specific language governing permissions and
15  * limitations under the License.
16  *
17  *****************************************************************************
18  * Originally developed and contributed by Ittiam Systems Pvt. Ltd, Bangalore
19 */
20 #ifndef IXHEAACD_MPS_DEC_H
21 #define IXHEAACD_MPS_DEC_H
22 
23 #define ABS_THR (1e-9f * 32768 * 32768)
24 
25 #define MAX_NUM_QMF_BANDS_MPS (128)
26 #define MAX_NUM_QMF_BANDS_MPS_NEW (64)
27 
28 #define MAX_PARAMETER_SETS_MPS (9)
29 #define MAX_M2_OUTPUT_MP (MAX_OUTPUT_CHANNELS_MPS)
30 #define BUFFER_LEN_HF_MPS ((QMF_HYBRID_FILT_ORDER - 1) / 2 + MAX_TIME_SLOTS)
31 #define MAX_OUTPUT_CHANNELS_MPS_AT (2)
32 #define HYBRID_BAND_BORDER (12)
33 
34 #define DECORR_FILT_0_ORD (10)
35 #define DECORR_FILT_1_ORD (8)
36 #define DECORR_FILT_2_ORD (3)
37 #define DECORR_FILT_3_ORD (2)
38 
39 #define MAX_DECORR_FIL_ORDER (DECORR_FILT_0_ORD)
40 
41 typedef struct {
42   FLOAT32 re;
43   FLOAT32 im;
44 
45 } ia_cmplx_flt_struct;
46 
47 typedef struct {
48   WORD32 re;
49   WORD32 im;
50 } ia_cmplx_w32_struct;
51 
52 typedef struct {
53   FLOAT32 *re;
54   FLOAT32 *im;
55 } ia_cmplx_fltp_struct;
56 
57 typedef struct ia_mps_decor_filt_struct {
58   WORD32 state_len;
59   WORD32 num_len;
60   WORD32 den_len;
61 
62   ia_cmplx_flt_struct state[MAX_DECORR_FIL_ORDER + 1];
63   const FLOAT32 *num;
64   const FLOAT32 *den;
65 
66 } ia_mps_decor_filt_struct;
67 
68 typedef struct ia_mps_decor_struct *ia_mps_decor_struct_handle;
69 
70 #define MAX_HYBRID_BANDS_MPS (MAX_NUM_QMF_BANDS_MPS_NEW - 3 + 10)
71 #define MAX_TIME_SLOTS (72)
72 #define MAX_PARAMETER_BANDS (28)
73 
74 #define MAX_M1_INPUT (2)
75 #define MAX_M1_OUTPUT (2)
76 #define MAX_M2_INPUT (2)
77 
78 #define MAX_M_INPUT (2)
79 #define MAX_M_OUTPUT (2)
80 
81 #define QMF_BANDS_TO_HYBRID (3)
82 #define MAX_HYBRID_ONLY_BANDS_PER_QMF (8)
83 #define QMF_HYBRID_FILT_ORDER (13)
84 #define BUFFER_LEN_LF_MPS (QMF_HYBRID_FILT_ORDER - 1 + MAX_TIME_SLOTS)
85 #define MAX_NO_TIME_SLOTS_DELAY (14)
86 
87 #define MAXNRSBRCHANNELS 2
88 
89 typedef struct ixheaacd_mps_decor_energy_adjust_filt_struct {
90   WORD32 num_bins;
91   FLOAT32 smooth_in_energy[MAX_PARAMETER_BANDS];
92   FLOAT32 smooth_out_energy[MAX_PARAMETER_BANDS];
93 
94 } ixheaacd_mps_decor_energy_adjust_filt_struct;
95 
96 typedef struct ia_mps_decor_struct {
97   WORD32 num_bins;
98   ia_mps_decor_filt_struct filter[MAX_HYBRID_BANDS_MPS];
99   ixheaacd_mps_decor_energy_adjust_filt_struct decor_nrg_smooth;
100 
101   WORD32 delay_sample_count[MAX_HYBRID_BANDS_MPS];
102 
103   ia_cmplx_flt_struct
104       decor_delay_buffer[71][MAX_TIME_SLOTS + MAX_NO_TIME_SLOTS_DELAY];
105 
106 } ia_mps_decor_struct;
107 
108 typedef struct ia_mps_hybrid_filt_struct {
109   ia_cmplx_flt_struct hf_buffer[MAX_NUM_QMF_BANDS_MPS][BUFFER_LEN_HF_MPS];
110   ia_cmplx_w32_struct lf_buffer[QMF_BANDS_TO_HYBRID][BUFFER_LEN_LF_MPS];
111 } ia_mps_hybrid_filt_struct;
112 
113 typedef struct ia_mps_data_struct {
114   WORD32 bs_xxx_data_mode[MAX_PARAMETER_SETS_MPS];
115   WORD32 quant_coarse_xxx_flag[MAX_PARAMETER_SETS_MPS];
116   WORD32 bs_freq_res_stride_xxx[MAX_PARAMETER_SETS_MPS];
117   WORD8 bs_quant_coarse_xxx[MAX_PARAMETER_SETS_MPS];
118   WORD8 bs_quant_coarse_xxx_prev;
119 } ia_mps_data_struct;
120 
121 typedef struct ia_mps_bs_frame {
122   WORD8 independency_flag;
123 
124   WORD32 cld_idx[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
125   WORD32 icc_idx[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
126 
127   WORD32 cld_idx_pre[MAX_PARAMETER_BANDS];
128   WORD32 icc_idx_pre[MAX_PARAMETER_BANDS];
129 
130   WORD32 cmp_cld_idx[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
131   WORD32 cmp_icc_idx[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
132 
133   WORD32 cmp_cld_idx_prev[MAX_PARAMETER_BANDS];
134   WORD32 cmp_icc_idx_prev[MAX_PARAMETER_BANDS];
135 
136   ia_mps_data_struct cld_data;
137   ia_mps_data_struct icc_data;
138   ia_mps_data_struct ipd_data;
139 
140   WORD32 ipd_idx_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
141   WORD32 ipd_idx_data_prev[MAX_PARAMETER_BANDS];
142   WORD32 ipd_idx[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
143   WORD32 ipd_idx_prev[MAX_PARAMETER_BANDS];
144 
145   WORD32 bs_smooth_mode[MAX_PARAMETER_SETS_MPS];
146   WORD32 bs_smooth_time[MAX_PARAMETER_SETS_MPS];
147   WORD32 bs_freq_res_stride_smg[MAX_PARAMETER_SETS_MPS];
148   WORD32 bs_smg_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
149 
150 } ia_mps_bs_frame;
151 
152 typedef struct ia_mps_smoothing_struct {
153   WORD32 prev_smg_time;
154   WORD32 inv_prev_smg_time;
155   WORD32 prev_smg_data[MAX_PARAMETER_BANDS];
156 } ia_mps_smoothing_struct;
157 
158 typedef struct ia_mps_env_reshape_struct {
159   FLOAT32 pb_energy_prev[3][MAX_PARAMETER_BANDS];
160   FLOAT32 avg_energy_prev[3];
161   FLOAT32 frame_energy_prev[3];
162 } ia_mps_env_reshape_struct;
163 
164 #define BP_SIZE 25
165 
166 typedef struct ia_mps_stp_struct {
167   FLOAT32 nrg_dir;
168   FLOAT32 nrg_diff[2];
169   FLOAT32 nrg_dir_prev;
170   FLOAT32 nrg_diff_prev[2];
171   FLOAT32 tp_scale_last[2];
172   WORD32 init_flag;
173   WORD32 update_old_ener;
174 } ia_mps_stp_struct;
175 
176 typedef struct ia_mps_opd_smooth_struct {
177   WORD32 smooth_l_phase[MAX_PARAMETER_BANDS];
178   WORD32 smooth_r_phase[MAX_PARAMETER_BANDS];
179 } ia_mps_opd_smooth_struct;
180 
181 typedef struct ia_mps_dec_state_struct {
182   WORD32 in_ch_count;
183   WORD32 out_ch_count;
184 
185   FLOAT32 input_gain;
186   WORD32 dir_sig_count;
187 
188   WORD32 decor_sig_count;
189 
190   WORD32 time_slots;
191   WORD32 present_time_slot;
192   WORD32 frame_len;
193 
194   WORD32 temp_shape_enable_ch_stp[2];
195   WORD32 temp_shape_enable_ch_ges[2];
196 
197   FLOAT32 env_shape_data[2][MAX_TIME_SLOTS];
198 
199   WORD8 parse_nxt_frame;
200 
201   WORD32 qmf_band_count;
202   WORD32 hyb_band_count;
203   const WORD32 *hyb_band_to_processing_band_table;
204 
205   WORD32 res_ch_count;
206 
207   WORD32 res_bands;
208   WORD32 max_res_bands;
209   WORD32 bs_param_bands;
210 
211   WORD32 ext_frame_flag;
212   WORD32 num_parameter_sets;
213   WORD32 num_parameter_sets_prev;
214   WORD32 param_slots[MAX_PARAMETER_SETS_MPS];
215   WORD32 param_slot_diff[MAX_PARAMETER_SETS_MPS];
216   FLOAT32 inv_param_slot_diff[MAX_PARAMETER_SETS_MPS];
217   WORD32 inv_param_slot_diff_Q30[MAX_PARAMETER_SETS_MPS];
218 
219   WORD32 frame_length;
220   WORD32 residual_coding;
221   WORD32 bs_residual_present;
222 
223   WORD32 bs_residual_bands;
224 
225   ia_usac_dec_mps_config_struct *config;
226   ia_mps_bs_frame bs_frame;
227 
228   WORD32 smoothing_time[MAX_PARAMETER_SETS_MPS];
229   WORD32 inv_smoothing_time[MAX_PARAMETER_SETS_MPS];
230   WORD32 smoothing_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
231 
232   WORD32 bs_tsd_enable;
233   WORD32 bs_tsd_sep_data[MAX_TIME_SLOTS];
234   WORD32 bs_tsd_tr_phase_data[MAX_TIME_SLOTS];
235   WORD32 tsd_num_tr_slots;
236   WORD32 tsd_codeword_len;
237 
238   FLOAT32 cld_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
239   FLOAT32 icc_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
240   FLOAT32 ipd_data[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
241 
242   WORD32 bs_phase_mode;
243   WORD32 opd_smoothing_mode;
244   WORD32 num_bands_ipd;
245 
246   FLOAT32 phase_l[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
247   FLOAT32 phase_r[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
248   FLOAT32 phase_l_prev[MAX_PARAMETER_BANDS];
249   FLOAT32 phase_r_prev[MAX_PARAMETER_BANDS];
250 
251   WORD32 phase_l_fix[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
252   WORD32 phase_r_fix[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS];
253 
254   WORD32 m1_param_re[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
255                     [MAX_M_INPUT];
256   WORD32 m1_param_im[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
257                     [MAX_M_INPUT];
258   WORD32 m2_decor_re[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
259                     [MAX_M_INPUT];
260   WORD32 m2_decor_im[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
261                     [MAX_M_INPUT];
262   WORD32 m2_resid_re[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
263                     [MAX_M_INPUT];
264   WORD32 m2_resid_im[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
265                     [MAX_M_INPUT];
266 
267   WORD32 m1_param_re_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
268   WORD32 m1_param_im_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
269   WORD32 m2_decor_re_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
270   WORD32 m2_decor_im_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
271   WORD32 m2_resid_re_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
272   WORD32 m2_resid_im_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT];
273 
274   ia_cmplx_flt_struct qmf_in[2][MAX_TIME_SLOTS][MAX_NUM_QMF_BANDS_MPS_NEW];
275   ia_cmplx_flt_struct hyb_in[2][MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
276   ia_cmplx_flt_struct hyb_res[MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
277   ia_cmplx_flt_struct v[MAX_M1_OUTPUT][MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
278   ia_cmplx_flt_struct w_diff[MAX_M2_INPUT][MAX_TIME_SLOTS]
279                             [MAX_HYBRID_BANDS_MPS];
280   ia_cmplx_flt_struct w_dir[MAX_M2_INPUT][MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
281   ia_cmplx_flt_struct hyb_dir_out[2][MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
282   ia_cmplx_flt_struct hyb_diff_out[2][MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
283 
284   ia_cmplx_flt_struct qmf_out_dir[2][MAX_TIME_SLOTS][MAX_NUM_QMF_BANDS_MPS];
285   ia_cmplx_flt_struct scratch[MAX_TIME_SLOTS][MAX_HYBRID_BANDS_MPS];
286 
287   FLOAT32 (*output_buffer)[4096];
288 
289   ia_mps_hybrid_filt_struct hyb_filt_state[2];
290   ia_mps_poly_phase_synth_struct qmf_filt_state[2];
291 
292   ia_mps_decor_struct mps_decor;
293 
294   ia_mps_smoothing_struct smoothing_filt_state;
295 
296   ia_mps_env_reshape_struct guided_env_shaping;
297 
298   WORD32 bs_high_rate_mode;
299 
300   WORD32 tmp_buf[84 * MAX_NUM_QMF_BANDS_SAC];
301 
302   FLOAT32 r_out_re_in_m1[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
303                         [MAX_M_INPUT];
304   FLOAT32 r_out_im_in_m1[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
305                         [MAX_M_INPUT];
306   WORD32 r_out_re_scratch_m1[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
307                             [MAX_M_INPUT];
308   WORD32 r_out_im_scratch_m1[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
309                             [MAX_M_INPUT];
310 
311   FLOAT32 r_out_re_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
312                         [MAX_M_INPUT];
313   FLOAT32 r_out_im_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
314                         [MAX_M_INPUT];
315   FLOAT32 r_out_diff_re_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
316                              [MAX_M_INPUT];
317   FLOAT32 r_out_diff_im_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
318                              [MAX_M_INPUT];
319 
320   WORD32 r_out_re_fix_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
321                            [MAX_M_INPUT];
322   WORD32 r_out_im_fix_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
323                            [MAX_M_INPUT];
324   WORD32 r_diff_out_re_fix_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS]
325                                 [MAX_M_OUTPUT][MAX_M_INPUT];
326   WORD32 r_diff_out_im_fix_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS]
327                                 [MAX_M_OUTPUT][MAX_M_INPUT];
328 
329   FLOAT32 r_out_ph_re_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2];
330   FLOAT32 r_out_ph_im_in_m2[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2];
331 
332   ia_mps_stp_struct subband_var;
333   ia_mps_opd_smooth_struct opd_smooth;
334   ia_mps_poly_phase_struct poly_phase_filt_kernel;
335   VOID *p_sbr_dec[MAXNRSBRCHANNELS];
336   VOID *p_sbr_frame[MAXNRSBRCHANNELS];
337   VOID *p_sbr_header[MAXNRSBRCHANNELS];
338 } ia_mps_dec_state_struct;
339 
340 VOID ixheaacd_mps_init_pre_and_post_matrix(ia_mps_dec_state_struct *self);
341 VOID ixheaacd_pre_and_mix_matrix_calculation(ia_mps_dec_state_struct *self);
342 WORD32 ixheaacd_mps_apply_pre_matrix(ia_mps_dec_state_struct *self);
343 WORD32 ixheaacd_mps_apply_mix_matrix(ia_mps_dec_state_struct *self);
344 
345 VOID ixheaacd_mps_config(ia_mps_dec_state_struct *self, WORD32 frame_len,
346                          WORD32 residual_coding,
347                          ia_usac_dec_mps_config_struct *mps212_config);
348 
349 WORD32 ixheaacd_mps_frame_decode(ia_mps_dec_state_struct *self);
350 
351 WORD32 ixheaacd_mps_header_decode(ia_mps_dec_state_struct *self);
352 
353 VOID ixheaacd_mps_env_init(ia_mps_dec_state_struct *self);
354 VOID ixheaacd_mps_time_env_shaping(ia_mps_dec_state_struct *self);
355 
356 VOID ixheaacd_mps_pre_matrix_mix_matrix_smoothing(
357     ia_mps_dec_state_struct *self);
358 VOID ixheaacd_mps_smoothing_opd(ia_mps_dec_state_struct *self);
359 WORD32 ixheaacd_mps_temp_process(ia_mps_dec_state_struct *self);
360 
361 VOID ixheaacd_mps_par2umx_ps(ia_mps_dec_state_struct *self,
362                              ia_mps_bs_frame *curr_bit_stream, WORD32 *h_real,
363                              WORD32 param_set_idx);
364 
365 VOID ixheaacd_mps_par2umx_ps_ipd_opd(ia_mps_dec_state_struct *self,
366                                      ia_mps_bs_frame *curr_bit_stream,
367                                      WORD32 *h_real, WORD32 param_set_idx);
368 
369 VOID ixheaacd_mps_par2umx_pred(ia_mps_dec_state_struct *self,
370                                ia_mps_bs_frame *curr_bit_stream, WORD32 *h_imag,
371                                WORD32 *h_real, WORD32 param_set_idx,
372                                WORD32 res_bands);
373 
374 WORD32 ixheaacd_mps_upmix_interp(
375     WORD32 m_matrix[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
376                    [MAX_M_INPUT],
377     WORD32 r_matrix[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][MAX_M_OUTPUT]
378                    [MAX_M_INPUT],
379     WORD32 m_matrix_prev[MAX_PARAMETER_BANDS][MAX_M_OUTPUT][MAX_M_INPUT],
380     WORD32 num_rows, WORD32 num_cols, ia_mps_dec_state_struct *self);
381 
382 VOID ixheaacd_mps_phase_interpolation(
383     FLOAT32 pl[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],
384     FLOAT32 pr[MAX_PARAMETER_SETS_MPS][MAX_PARAMETER_BANDS],
385     FLOAT32 pl_prev[MAX_PARAMETER_BANDS], FLOAT32 pr_prev[MAX_PARAMETER_BANDS],
386     FLOAT32 r_re[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],
387     FLOAT32 r_im[MAX_TIME_SLOTS][MAX_PARAMETER_BANDS][2],
388     ia_mps_dec_state_struct *self);
389 
390 #endif
391